參數(shù)資料
型號: LC72135M
元件分類: PLL合成/DDS/VCOs
英文描述: PLL FREQUENCY SYNTHESIZER, 40 MHz, PDSO20
封裝: MFP-20
文件頁數(shù): 24/24頁
文件大小: 300K
代理商: LC72135M
Serial Data I/O Methods
The LC72135M inputs and outputs data using the Sanyo CCB (computer control bus) audio LSI serial bus format. This
LSI adopts an 8-bit address format CCB.
No. 5127-9/24
LC72135M
I/O mode
Address
Function
B0
B1
B2
B3
A0
A1
A2
A3
2
3
IN1 (82)
IN2 (92)
OUT (A2)
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Control data input mode (serial data input)
24 data bits are input.
See the “DI Control Data (serial data input) Structure”
item for details on the meaning of the input data.
Control data input mode (serial data input)
24 data bits are input.
See the “DI Control Data (serial data input) Structure”
item for details on the meaning of the input data.
Data output mode (serial data output)
The number of bits output is equal to the number of
clock cycles.
See the “DO Output Data (Serial Data Output) Structure”
item for details on the meaning of the output data.
1
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