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參數(shù)資料
| 型號(hào)： | LC78631E |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP80 |
| 封裝： | QFP-80 |
| 文件頁數(shù)： | 22/34頁 |
| 文件大?。?/td> | 502K |
| 代理商： | LC78631E |
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No. 5342-29/34
LC78631E
30. Other pins; Pin 8: TAI, pin 12: TEST1, pin 16: TEST2, pin 17: TEST3, pin 26: TEST4, pin 77: TEST5
These are test pins for testing the LSI internal circuits. TAI and TEST1 to TEST5 have built-in pull-down resistors.
31. RAM address control
The LC78631E incorporates an 8-bit
× 2336-word RAM on chip. This RAM provides an EFM demodulated data
jitter handling capacity of ±8 frames implemented using address control. The LC78631E continuously checks the
remaining buffer capacity and controls the data write address to fall in the center of the buffer capacity by making
fine adjustments to the frequency divisor in the PCK side of the CLV servo circuit. If the ±8 frame buffer capacity is
exceeded, the LC78631E forcibly sets the write address to the ±0 position. However, since the errors that occur due
to this operation cannot be handled with error flag processing, the IC applies muting to the output for a 109 frame
period.
Position
Division ratio or processing
–8 or lower
Forcibly moves to ±0
–7 to –1
Advancing divisor: 589
±0
Standard divisor: 588
+1 to +7
Fall back divisor: 587
+8 or greater
Forcibly moves to ±0
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