參數(shù)資料
型號(hào): LFEC33E-3FN672C
廠商: Lattice Semiconductor Corporation
文件頁(yè)數(shù): 142/163頁(yè)
文件大?。?/td> 0K
描述: IC FPGA 32.8KLUTS 672FPBGA
標(biāo)準(zhǔn)包裝: 40
系列: EC
邏輯元件/單元數(shù): 32800
RAM 位總計(jì): 434176
輸入/輸出數(shù): 496
電源電壓: 1.14 V ~ 1.26 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 672-BBGA
供應(yīng)商設(shè)備封裝: 672-FPBGA(27x27)
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2-5
Architecture
LatticeECP/EC Family Data Sheet
Modes of Operation
Each Slice is capable of four modes of operation: Logic, Ripple, RAM and ROM. The Slice in the PFF is capable of
all modes except RAM. Table 2-2 lists the modes and the capability of the Slice blocks.
Table 2-2. Slice Modes
Logic Mode: In this mode, the LUTs in each Slice are configured as 4-input combinatorial lookup tables. A LUT4
can have 16 possible input combinations. Any logic function with four inputs can be generated by programming this
lookup table. Since there are two LUT4s per Slice, a LUT5 can be constructed within one Slice. Larger lookup
tables such as LUT6, LUT7 and LUT8 can be constructed by concatenating other Slices.
Ripple Mode: Ripple mode allows the efficient implementation of small arithmetic functions. In ripple mode, the fol-
lowing functions can be implemented by each Slice:
Addition 2-bit
Subtraction 2-bit
Add/Subtract 2-bit using dynamic control
Up counter 2-bit
Down counter 2-bit
Ripple mode multiplier building block
Comparator functions of A and B inputs
- A greater-than-or-equal-to B
- A not-equal-to B
- A less-than-or-equal-to B
Ripple Mode includes an optional configuration that performs arithmetic using fast carry chain methods. In this
configuration (also referred to as CCU2 mode) two additional signals, Carry Generate and Carry Propagate, are
generated on a per slice basis to allow fast arithmetic functions to be constructed by concatenating Slices.
RAM Mode: In this mode, distributed RAM can be constructed using each LUT block as a 16x1-bit memory.
Through the combination of LUTs and Slices, a variety of different memories can be constructed.
The Lattice design tools support the creation of a variety of different size memories. Where appropriate, the soft-
ware will construct these using distributed memory primitives that represent the capabilities of the PFU. Table 2-3
shows the number of Slices required to implement different distributed RAM primitives. Figure 2-5 shows the dis-
tributed memory primitive block diagrams. Dual port memories involve the pairing of two Slices, one Slice functions
as the read-write port. The other companion Slice supports the read-only port. For more information about using
RAM in LatticeECP/EC devices, please see the list of technical documentation at the end of this data sheet.
Table 2-3. Number of Slices Required For Implementing Distributed RAM
Logic
Ripple
RAM
ROM
PFU Slice
LUT 4x2 or LUT 5x1
2-bit Arithmetic Unit
SPR16x2
ROM16x1 x 2
PFF Slice
LUT 4x2 or LUT 5x1
2-bit Arithmetic Unit
N/A
ROM16x1 x 2
SPR16x2
DPR16x2
Number of slices
1
2
Note: SPR = Single Port RAM, DPR = Dual Port RAM
相關(guān)PDF資料
PDF描述
LFECP33E-3FN484C IC FPGA 32.8KLUTS 360I/O 484-BGA
RGM43DTMS CONN EDGECARD 86POS R/A .156 SLD
RMM43DTMS CONN EDGECARD 86POS R/A .156 SLD
RSM43DTMS CONN EDGECARD 86POS R/A .156 SLD
RSM43DTBS CONN EDGECARD 86POS R/A .156 SLD
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LFEC33E-3FN672I 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 32.8K LUTs 1.2V -3 Spd I RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
LFEC33E-3Q208C 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet
LFEC33E-3Q208I 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet
LFEC33E-3QN208C 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet
LFEC33E-3QN208I 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet