參數(shù)資料
型號: LFEC33E-5FN672C
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 106/163頁
文件大?。?/td> 0K
描述: IC FPGA 32.8KLUTS 672FPBGA
標(biāo)準(zhǔn)包裝: 40
系列: EC
邏輯元件/單元數(shù): 32800
RAM 位總計(jì): 434176
輸入/輸出數(shù): 496
電源電壓: 1.14 V ~ 1.26 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 672-BBGA
供應(yīng)商設(shè)備封裝: 672-FPBGA(27x27)
3-11
DC and Switching Characteristics
LatticeECP/EC Family Data Sheet
RSDS
The LatticeECP/EC devices support differential RSDS standard. This standard is emulated using complementary
LVCMOS outputs in conjunction with a parallel resistor across the driver outputs. The RSDS input standard is sup-
ported by the LVDS differential input buffer. The scheme shown in Figure 3-4 is one possible solution for RSDS
standard implementation. Use LVDS25E mode with suggested resistors for RSDS operation. Resistor values in
Figure 3-4 are industry standard values for 1% resistors.
Figure 3-4. RSDS (Reduced Swing Differential Standard)
Table 3-4. RSDS DC Conditions
Parameter
Description
Typical
Units
ZOUT
Output impedance
20
ohm
RS
Driver series resistor
294
ohm
RP
Driver parallel resistor
121
ohm
RT
Receiver termination
100
ohm
VOH
Output high voltage
1.35
V
VOL
Output low voltage
1.15
V
VOD
Output differential voltage
0.20
V
VCM
Output common mode voltage
1.25
V
ZBACK
Back impedance
101.5
ohm
IDC
DC output current
3.66
mA
100
294
On-chip
Emulated
RSDS Buffer
VCCIO = 2.5V
Zo = 100
+
-
121
Off-chip
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