參數(shù)資料
型號: LFEC33E-5FN672C
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 107/163頁
文件大?。?/td> 0K
描述: IC FPGA 32.8KLUTS 672FPBGA
標(biāo)準(zhǔn)包裝: 40
系列: EC
邏輯元件/單元數(shù): 32800
RAM 位總計: 434176
輸入/輸出數(shù): 496
電源電壓: 1.14 V ~ 1.26 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 672-BBGA
供應(yīng)商設(shè)備封裝: 672-FPBGA(27x27)
3-12
DC and Switching Characteristics
LatticeECP/EC Family Data Sheet
Typical Building Block Function Performance
Pin-to-Pin Performance (LVCMOS25 12mA Drive)
Register-to-Register Performance1
Function
-5 Timing
Units
Basic Functions
16-bit decoder
5.5
ns
32-bit decoder
6.9
ns
64-bit decoder
7.1
ns
4:1 MUX
4.3
ns
8:1 MUX
4.7
ns
16:1 MUX
5.0
ns
32:1 MUX
5.5
ns
Function
-5 Timing
Units
Basic Functions
16 bit decoder
410
MHz
32 bit decoder
283
MHz
64 bit decoder
272
MHz
4:1 MUX
613
MHz
8:1 MUX
565
MHz
16:1 MUX
526
MHz
32:1 MUX
442
MHz
8-bit adder
363
MHz
16-bit adder
353
MHz
64-bit adder
196
MHz
16-bit counter
414
MHz
32-bit counter
317
MHz
64-bit counter
216
MHz
64-bit accumulator
178
MHz
Embedded Memory Functions
256x36 Single Port RAM
280
MHz
512x18 True-Dual Port RAM
280
MHz
Distributed Memory Functions
16x2 Single Port RAM
460
MHz
64x2 Single Port RAM
375
MHz
128x4 Single Port RAM
294
MHz
32x2 Pseudo-Dual Port RAM
392
MHz
64x4 Pseudo-Dual Port RAM
332
MHz
DSP Function2
9x9 Pipelined Multiply/Accumulate
242
MHz
18x18 Pipelined Multiply/Accumulate
238
MHz
36x36 Pipelined Multiply
235
MHz
1. These timing numbers were generated using the ispLEVER design tool. Exact performance may vary with design and tool version. The tool
uses internal parameters that have been characterized but are not tested on every device.
2. Applies to LatticeECP devices only.
Timing v.G 0.30
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