參數(shù)資料
型號(hào)： LIS3L02DQ
廠商： STMICROELECTRONICS
元件分類： 模擬信號(hào)調(diào)理
英文描述： SPECIALTY ANALOG CIRCUIT, QCC44
封裝： 7 X 7 MM, 1.80 MM HEIGHT, QFN-44
文件頁(yè)數(shù)： 19/20頁(yè)
文件大?。?/td> 473K
代理商： LIS3L02DQ
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LIS3L02DQ
8/20
6
Digital Interfaces
The registers embedded inside the LIS3L02DQ may be accessed through both the I2C and SPI serial in-
terfaces. The latter may be software configured to operate either in SPI mode or in 3-wire interface mode.
The serial interfaces are mapped onto the same pads. To select the I2C interface, CS line must be tied
high (i.e connected to Vdd).
Table 6. Serial Interface Pin Description
6.1 I2C Serial Interface
The LIS3L02DQ I2C is a bus slave. The I2C is implemented in the way that the data can be written into
the registers whose content can also be read back.
The relevant I2C terminology is given in the table below:
Table 7. Serial Interface Pin Description
There are two signals associated with the I2C bus: the Serial Clock Line (SCL) and the Serial Data line
(SDA). The latter is a bidirectional line used for sending and receiving the data to/from the interface. Both
the lines are connected to Vdd through a pull-up resistor embedded inside the LIS3L02DQ. When the bus
is free both lines are high.
The I2C interface is compliant with Fast Mode (400 kHz) I2C standards as well as the Normal Mode.
6.2 I2C Operation
The transaction on the bus is started through a START signal. A START condition is defined as a HIGH
to LOW transition on the data line while the SCL line is held HIGH. After this has been transmitted by the
Master, the bus is considered busy. The next byte of data transmitted after the start condition contains the
address of the slave in the first 7 bits and the eighth bit tells whether the Master is receiving data from the
slave or transmitting data to the slave. When an address is sent, each device in the system compares the
first seven bits after a start condition with its address. If they match, the device considers itself addressed
by the Master.The Slave ADdress (SAD) associated to the LIS3L02DQ is 0011101.
It’s mandatory to use “acknowledge” during data transfer. The transmitter must release the SDA line dur-
PIN Name
PIN Description
CS
SPI enable
I2C/SPI mode selection (1: I2C mode; 0: SPI enabled)
SCL/SPC
I2C Serial Clock (SCL)
SPI Serial Port Clock (SPC)
SDA/SDI/SDO
I2C Serial Data (SDA)
SPI Serial Data Input (SDI)
3-wire Interface Serial Data Output (SDO)
SDO
SPI Serial Data Output (SDO)
Term
Description
Transmitter
The device which sends data to the bus
Receiver
The device which receives data from the bus
Master
The device which initiates a transfer, generates clock signals and terminates a transfer
Slave
The device addressed by the master
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