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參數(shù)資料
| 型號(hào)： | LM1212 |
| 文件頁數(shù)： | 5/18頁 |
| 文件大?。?/td> | 285K |
| 代理商： | LM1212 |
Circuit Description
Figure 2 shows a block diagram of the LM1212 video ampli-
fier along with contrast and brightness (black level) control.
Contrast control is a DC-operated attenuator which varies
the AC gain of the amplifier. Signal attenuation (contrast) is
achieved by varying the base drive to a differential pair and
thereby unbalancing the current through the differential pair.
As shown in Figure 2, a 5.3V bias voltage is internally con-
nected to the positive input of the attenuator and to Pin 1.
Pin 3 provides a control voltage for the negative input (pin 2)
of the attenuator. The voltage at pin 3 varies as the voltage
at the contrast control input (pin 8) varies thus providing
signal attenuation. The gain is maximum (0 dB attenuation)
if the voltage at pin 8 is 4V and is minimum (maximum atten-
uation) if the voltage at pin 8 is 0V. The 0V to 4V DC-operat-
ed drive control at pin 9 provides a 6 dB gain adjustment
range. This feature is necessary for RGB applications where
independent gain adjustment of each channel is required.
The brightness or black level clamping requires a ‘‘sample
and hold’’ circuit which holds the DC bias of the video ampli-
fier constant during the black level reference portion of the
video waveform. Black level clamping, often referred to as
DC restoration, is accomplished by applying a back porch
clamp signal to the clamp gate input pin (pin 14). The clamp
comparator is enabled when the clamp signal goes low dur-
ing the black level reference period (see Figure 2 ). When
the clamp comparator is enabled, the clamp capacitor con-
nected to pin 12 is either charged or discharged until the
voltage at the minus input of the comparator matches the
voltage set at the plus input of the comparator. During the
video portion of the signal, the clamp comparator is disabled
and the clamp capacitor holds the proper DC bias. In a DC
coupled cathode drive application, picture brightness func-
tion can be achieved by varying the voltage at the compara-
tor’s plus input. Note that the back porch clamp pulse width
(t
W
in Figure 2 ) must be greater than 100 ns for proper
operation.
OSD blanking is activated through an active high TTL signal
at pin 20. When pin 20 has a high logic level the video
output at pin 17 drops to
k
100 mV. During this time an
external signal can be applied to the output, driving the vid-
eo level to the desired level for the OSD window. This OSD
signal will back bias the emitter of the internal output tran-
sistor, Q23 (see Figure 4 ). The maximum voltage to this
transistor under this condition is 5V. This signal must also
supply enough current to the pull-down transistor, Q24,
which is about 100 mA. The OSD blanking can only be done
during the active video period. If activated during the clamp
pulse period, the OSD blanking will interfere with the DC
restoration.
VIDEO AMPLIFIER SECTION (Input Stage)
A simplified schematic of LM1212’s video amplifier input
stage is shown in Figure 3 . The 5.4V zener diode, Q1, Q6
and R2 bias the base of Q7 at 2.6V. The AC coupled video
signal applied to pin 6 is referenced to the 2.6V bias voltage.
TL/H/12354–8
FIGURE 2. Block Diagram of the LM1212 Video Amplifier
with Contrast and Brightness (Black Level) Control
http://www.national.com
5
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