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參數(shù)資料
| 型號： | LM1212 |
| 文件頁數(shù)： | 7/18頁 |
| 文件大?。?/td> | 285K |
| 代理商： | LM1212 |
Circuit Description
(Continued)
VIDEO AMPLIFIER SECTION (Output Stage)
A simplified schematic of LM1212’s video amplifier output
stage is shown in Figure 4. The output stage is the second
gain stage. Ideally the gain of the second gain stage would
be A
V2
e b
R21/R18
e b
16. Because of the output
stage’s low open loop gain, the gain is approximately
A
V2
e b
10. Thus the maximum gain of the video amplifier
is A
V
e
A
V1
c
A
V2
e
20. Transistors Q23 and Q24 provide
a push-pull drive to the load. The output voltage can swing
from 0.2V to 10V.
Q82 is the OSD blanking transistor. Its base is connected to
pin 20 via R34. A high TTL signal at pin 20 turns on Q82.
This forces a current flow-through R20 and R31. These two
resistors form a voltage divider from the emitter of Q82. If
the input at pin 20 ia a minimum TTL high of 2.0V, then the
juction of R20 and R31 will have a voltage of 0.6V. This
voltage is applied to the bases of Q22 and Q24. 0.6V is just
enough voltage to drive transistors Q22 and Q24 into satu-
ration, forcing the output voltage at pin 17 to drop below
100 mV. The OSD video signal is applied during this period.
The emitter-base junction of Q82 can withstand a maximum
reverse bias voltage of 5V, thus pin 17 must not be driven
above 5V during OSD blanking.
CONTRAST CONTROL SECTION
A simplified schematic of LM1212’s contrast control section
is shown inFigure 5. A 0V to 4V DC voltage is applied at the
contrast input (pin 8). Transistors Q29, Q30 and Q34 buffer
and level shift the contrast voltage to the base of Q36. The
voltage at the emitter of Q36 equals the contrast voltage
(V
cont
) and the current through Q36’s collector is given by
I
C36
e
V
cont
/R28.
Transistor Q36’s collector current is used to unbalance the
current through the differential pair comprised of Q38 and
Q40. Q40’s base is internally biased at 5.3V. The 5.3V refer-
ence is also connected to pin 1 and to the base of Q10 (see
Figure 3 ). The base of Q38 (pin 3) is externally connected
to pin 2 through a 10
X
resistor (seeFigures 2 and3 ). With
V
cont
e
2V, the differential pair (Q38, Q40) is balanced and
the voltage at pins 1 and 2 is 5.3V. Under this condition,
Q8’s collector current is equally split between Q9 and Q10
(seeFigure 3 ) and the amplifier’s gain is half the maximum
gain. If contrast voltage at pin 8 is greater than 2V then
Q36’s collector current increases, thus pulling Q38’s collec-
tor node lower and consequently moving Q38’s base below
5.3V. With pin 2 at a lower voltage than pin 1, current
through Q10 (see Figure 3 ) increases and the amplifier’s
gain increases. With V
cont
e
4V, the amplifier’s gain is max-
imum.
If the contrast voltage at pin 8 is less than 2V then Q36’s
collector current decreases and Q38’s base is pulled above
5.3V. With pin 2 voltage greater than pin 1 voltage, less
current flows through Q10 (seeFigure 3 ), consequently the
amplifier’s gain decreases. With V
cont
e
0V, the amplifier’s
gain is minimum (i.e., maximum attenuation).
TL/H/12354–10
FIGURE 4. Simplified Schematic of LM1212 Video Amplifier Output Stage
http://www.national.com
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