Circuit Description
(Continued)
Transistor Q7 buffers the video signal, V
IN
, and Q8 converts
the voltage to current. The AC collector current through Q8
is I
C8
e
V
IN
/R9. Under maximum gain condition, transistors
Q9 and Q11 are off and all of I
C8
flows through the load
resistors R10 and R11. The maximum signal gain at the
base of Q13 is, A
V1
e b
(R10
a
R11)/R9
e b
2. Signal
attenuation is achieved by varying the base drive to the dif-
ferential pairs Q9, Q10 and Q11, Q12 thereby unbalancing
the collector currents through the transistor pairs. Base of
Q10 is biased at 5.3V by its connection to the emitter of Q41
(see Figure 5 ). Pin 2 is connected to pin 3 through a 10
X
resistor. Adjusting the contrast voltage at pin 8 produces
a control voltage at pin 3 which drives the base of Q9. By
varying the voltage at the base of Q9, Q8’s collector current
(I
C8
) is diverted away from the load resistors R10 and R11,
thereby providing signal attenuation. Maximum attenuation
is achieved when all of I
C8
flows through Q9 and no current
flows through the load resistors.
The differential pair Q11 and Q12 provide drive control.
Q12’s base is internally biased at 7.3V. Adjusting the volt-
age at the drive control input (pin 9) produces a control
voltage at the base of Q11. With Q9 off and Q12 off, all of
I
C8
flows through R10, thus providing a gain of A
V1
e
b
(R10/R9)
c
V
IN
e b
1. Drive control thus provides a
6 dB attenuation range.
TL/H/12354–9
FIGURE 3. Simplified Schematic of the LM1212 Video Amplifier Input Stage
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