參數(shù)資料
型號(hào): LM2698
文件頁數(shù): 15/17頁
文件大?。?/td> 503K
代理商: LM2698
Application Information
(Continued)
Level-Shifted SEPIC
The circuit shown in Figure 8 is similar to the SEPIC shown
in Figure 7 except that it is level shifted to provide a negative
output voltage. This is achieved by connecting the ground of
the LM2698 to the output. The circuit analysis for the
level-shifted SEPIC is the same as the SEPIC. The voltage
at the input of the LM2698 will need to be clamped if the
absolute value of the output voltage plus the input voltage
exceeds 12V, the absolute maximum rating for the V
pin.
The simplest way to do this is with a zener diode, as shown
in Figure 8 Likewise, if the FSLCT pin is pulled high to
operate at 1.25 MHz, its voltage must not exceed 12V. To
prevent any high frequency noise from entering the
LM2698’s internal circuitry, a high frequency bypass capaci-
tor must be placed as close to pin 6 as possible. A good
choice for this capacitor is a 0.1μF ceramic capacitor.
Power Dissipation
The output power of the LM2698 is limited by its maximum
power dissipation. The maximum power dissipation is deter-
mined by the formula
P
D
= (T
jmax
- T
A
)/
θ
JA
where T
jmax
is the maximum specified junction temperature
(125C), T
A
is the ambient temperature, and
θ
JA
is the ther-
mal resistance of the package.
θ
JA
is dependant on the
layout of the board as shown below.
20012611
20012612
20012643
FIGURE 8. Level-Shifted SEPIC Converter
L
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