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參數(shù)資料
| 型號： | LM2744 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Low Voltage N-Channel MOSFET Synchronous Buck Regulator Controller with External Reference |
| 中文描述： | 低壓N溝道MOSFET同步降壓穩(wěn)壓控制器與外部參考 |
| 文件頁數(shù)： | 9/22頁 |
| 文件大?。?/td> | 663K |
| 代理商： | LM2744 |
Block Diagram
20106003
Application Information
THEORY OF OPERATION
The LM2744 is a voltage-mode, high-speed synchronous
buck regulator with a PWM control scheme. It is designed for
use in set-top boxes, thin clients, DSL/Cable modems, and
other applications that require high efficiency buck convert-
ers. It has output shutdown (SD), input undervoltage lock-out
(UVLO) mode and power good (PWGD) flag (based on
overvoltage and undervoltage detection). The overvoltage
and undervoltage signals are OR-gated to drive the power
good signal and provide a logic signal to the system if the
output voltage goes out of regulation. Current limit is
achieved by sensing the voltage V
DS
across the low side
MOSFET.
START UP/SOFT-START
When V
exceeds 2.76V and the shutdown pin (SD) sees
a logic high, the soft-start period begins. Then an internal,
fixed 10 μA source begins charging the soft-start capacitor.
During soft-start the voltage on the soft-start capacitor C
is
connected internaly to the non-inverting input of the error
amplifier. The soft-start period lasts until the voltage on the
soft-start capacitor exceeds the LM2744 reference voltage.
At this point the reference voltage takes over at the non-
inverting error amplifier input. The capacitance of C
SS
deter-
mines the length of the soft-start period, and can be approxi-
mated by:
C
SS
= t
SS
/ (100 x V
REF
)
Where C
SS
is in μF and t
SS
is in ms.
During soft-start the Power Good flag is forced low and it is
released when the FB pin voltage reaches 70% of V
REF
. At
this point the chip enters normal operation mode, and the
output overvoltage and undervoltage monitoring starts.
NORMAL OPERATION
While in normal operation mode, the LM2744 regulates the
output voltage by controlling the duty cycle of the high-side
and low-side MOSFETs (see Typical Application Circuit).The
equation governing output voltage is:
The PWM frequency is adjustable between 50 kHz and 1
MHz and is set by an external resistor, R
, between the
FREQ pin and ground. The resistance needed for a desired
frequency is approximately:
Where F
SW
is in Hz and R
FADJ
is in k
.
L
www.national.com
9
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