參數(shù)資料
型號: LM75AD
廠商: NXP Semiconductors N.V.
元件分類: 工業(yè)控制
英文描述: Digital temperature sensor and thermal watchdog
封裝: LM75AD<SOT96-1 (SO8)|<<http://www.nxp.com/packages/SOT96-1.html<1<week 17, 2005,;LM75AD<SOT96-1 (SO8)|<<http://www.nxp.com/packages/SOT96-1.html<1<week 17, 2005,;LM
文件頁數(shù): 9/24頁
文件大小: 137K
代理商: LM75AD
LM75A_4
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 04 — 10 July 2007
9 of 24
NXP Semiconductors
LM75A
Digital temperature sensor and thermal watchdog
When a set-point register is read, all 16 bits are provided to the bus and must be collected
by the controller to complete the bus operation. However, only the 9 most significant bits
should be used and the 7 LSB of the LSByte are equal to zero and should be ignored.
Table 13
shows examples of the limit data and value.
7.5 OS output and polarity
The OS output is an open-drain output and its state represents results of the device
watchdog operation as described in
Section 7.1
. In order to observe this output state, an
external pull-up resistor is needed. The resistor should be as large as possible, up to
200 k
, to minimize the Temp reading error due to internal heating by the high OS sinking
current.
The OS output active state can be selected as HIGH or LOW by programming bit B2
(OS_POL) of register Conf: setting bit OS_POL to logic 1 selects OS active HIGH and
setting bit B2 to logic 0 sets OS active LOW. At power-up, bit OS_POL is equal to logic 0
and the OS active state is LOW.
7.6 OS comparator and interrupt modes
As described in
Section 7.1
, the device OS output responds to the result of the
comparison between register Temp data and the programmed limits, in registers Tos and
Thyst, in different ways depending on the selected OS mode: OS comparator or
OS interrupt. The OS mode is selected by programming bit B1 (OS_COMP_INT) of
register Conf: setting bit OS_COMP_INT to logic 1 selects the OS interrupt mode, and
setting to logic 0 selects the OS comparator mode. At power-up, bit OS_COMP_INT is
equal to logic 0 and the OS comparator is selected.
Table 11.
MSByte
7
D8
Tos register
LSByte
7
D0
6
5
4
3
2
1
0
6
X
5
X
4
X
3
X
2
X
1
X
0
X
D7
D6
D5
D4
D3
D2
D1
Table 12.
MSByte
7
D8
Thyst register
LSByte
7
D0
6
5
4
3
2
1
0
6
X
5
X
4
X
3
X
2
X
1
X
0
X
D7
D6
D5
D4
D3
D2
D1
Table 13.
11-bit binary
(2’s complement)
0 1111 1010
0 0011 0010
0 0000 0001
0 0000 0000
1 1111 1111
1 1100 1110
1 1001 0010
Tos and Thyst limit data and value
Hexadecimal value
Decimal value
Value
0FA
032
001
000
1FF
1CE
192
250
50
1
0
1
50
110
+125.0
°
C
+25.0
°
C
+0.5
°
C
0.0
°
C
0.5
°
C
25.0
°
C
55.0
°
C
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