參數(shù)資料
型號(hào)： LM9812CCV
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： 模擬信號(hào)調(diào)理
英文描述： LM9812 30-Bit Color Linear CCD Sensor Processor
中文描述： SPECIALTY ANALOG CIRCUIT, PQCC52
封裝： PLASTIC, LCC-52
文件頁(yè)數(shù)： 9/37頁(yè)
文件大?。?/td> 479K
代理商： LM9812CCV
9
http://www.national.com
Pin Descriptions
Sensor Driver Signals
1
Digital Output. Clock signal, phase 1.
2
Digital Output. Clock signal, phase 2.
RS
Digital Output. Reset pulse.
TR1, TR2
Digital Output. Transfer pulses.
Analog I/O
OS
R
, OS
G
,
OS
B
,
Analog Inputs. These inputs (for Red, Green,
and Blue) should be tied to the sensor’s OS
(Output Signal) through DC blocking capaci-
tors.
V
REF IN
Analog Input. This is the system reference volt-
age input and should be connected to a 2.0V
voltage source and bypassed to AGND with a
0.05μF monolithic capacitor.
V
REF LO OUT,
V
REF LO IN
Analog Output/Input. V
REF LO OUT
is a voltage
equal to 0.49V
A
- V
REF IN
/2 (1.45V for V
REF
IN
=2V) developed by the LM9812. It should be
tied to V
REF LO IN
and bypassed to AGND with
a 0.05μF monolithic capacitor.
V
REF MID OUT,
V
REF MID IN
Analog Output/Input. V
is a voltage
equal to 0.49V
(2.45V for V
=2V) devel-
oped by the LM9812. It should be tied to V
and bypassed to AGND with a 0.05μF
monolithic capacitor.
V
REF HI OUT,
V
REF HI IN
Analog Output/Input. V
REF HI OUT
is a voltage
equal to 0.49V
A
+ V
REF IN
/2 (3.45V for V
REF
IN
=2V) developed by the LM9812. It should be
tied to V
REF HI IN
and bypassed to AGND with a
0.05μF monolithic capacitor.
Configuration Register I/O
CS
Digital Input. This is the Chip Select signal for
reading or writing to the Configuration Register
through the D0-D9 databus. This input must be
low in order to enable writing to or reading from
the Configuration Register.
RD
Digital Input. A low signal on this input, when
SYNC and CS are also low, places the data in
the currently addressed Configuration Regis-
ter on the D0-D9 databus. A RD cycle also
resets the internal address latching state
machine. NOTE: If this pin is taken low when
CS is high, the D0-D9 databus will come out of
tri-state and drive random data onto the bus.
WR
Digital Input. This input, when simultaneously
asserted along with CS, transfers the data on
the D0-D9 databus to the LM9812. If this is the
first write in the cycle, this data is the address
to be read or written to. If this is the second
write in the cycle, this data is the data to be
written to the Configuration Register at the cur-
rently latched address. Writing to the Configu-
ration Register is independent of the state of
SYNC.
General Digital I/O
MCLK
Digital Input. This is the 24MHz (typical) master
system clock.
SYNC
Digital Input (SYNC_IN mode) /
Digital Output (SYNC_OUT mode).
In the SYNC_IN mode, a low-to-high transition
on this input begins a line scan operation. The
line scan operation terminates when SYNC is
taken low. In the SYNC_OUT mode, the rising
edge of this output indicates the start of a line
of data and the falling edge indicates the end of
a line of data.
RUN/STOP
Digital Input. In the SYNC_OUT mode, this
input should be taken high to begin converting
a series of lines, and taken low to stop convert-
ing a series of lines. In the SYNC_IN mode this
input is ignored.
Digital Coefficient I/O
CD0 (LSB) -
CD9 (MSB)
Digital Inputs. This is the 10 bit data path for
the pixel-rate gain coefficient and offset data.
OCLK
Digital Input/Output. This is the signal that is
used to clock the Offset coefficients into the
LM9812 through the CD0-CD9 databus. This
can be either an output or an input depending
on the state of bit 7 of Register 9. Data is
latched on the rising edge of OCLK.
GCLK
Digital Input/Output. This is the signal that is
used to clock the Shading (gain) coefficients
into the LM9812 through the CD0-CD9 data-
bus. This can be either an output or an input
depending on the state of bit 7 of Register 9.
Data is latched on the rising edge of GCLK.
Digital Output I/O
D0 (LSB)-
D9 (MSB)
Digital Inputs/Outputs. When SYNC is high and
RD PIXEL is low, this data bus outputs the 10
bit digital output data during line scan. This
databus is also used for reading or writing to
the Configuration Register using the RD, WR
and CS signals. Writing to the Configuration
Register can occur at any time. Reading from
the Configuration Register can only occur
when SYNC is low.
EOC
Digital Output. This is the End Of Conversion
signal from the LM9812 indicating that new
pixel data is available on the D0-D9 databus.
RD PIXEL
Digital Input. When SYNC is high, taking this
input low places the digital pixel data stored in
the output latch onto the D0-D9 bus. This input
is ignored when SYNC is low.
Test
TEST
Analog Output. This pin can be used to view
the CDS and Clamp signals. See Register 27,
bits 6 and 7.
相關(guān)PDF資料
PDF描述
LM9823CCWM LM9823 3 Channel 48-Bit Color Scanner Analog Front End
LM9823CCWMX LM9823 3 Channel 48-Bit Color Scanner Analog Front End
LMC13204 Quad SPST High Voltage CMOS Analog Switches
LMC13334 Quad SPST High Voltage CMOS Analog Switches
LMC13335 Quad SPST High Voltage CMOS Analog Switches
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LM981-SC36 功能描述:基本/快動(dòng)開關(guān) Foot Switch RoHS:否 制造商:Omron Electronics 觸點(diǎn)形式:SPDT 執(zhí)行器:Lever 電流額定值:5 A 電壓額定值 AC:250 V 電壓額定值 DC:30 V 功率額定值: 工作力:120 g IP 等級(jí):IP 67 NEMA 額定值: 端接類型:Wire 安裝:Panel
LM981-ZZ 功能描述:基本/快動(dòng)開關(guān) Foot Switch RoHS:否 制造商:Omron Electronics 觸點(diǎn)形式:SPDT 執(zhí)行器:Lever 電流額定值:5 A 電壓額定值 AC:250 V 電壓額定值 DC:30 V 功率額定值: 工作力:120 g IP 等級(jí):IP 67 NEMA 額定值: 端接類型:Wire 安裝:Panel
LM981-ZZ-1 功能描述:基本/快動(dòng)開關(guān) Foot Switch RoHS:否 制造商:Omron Electronics 觸點(diǎn)形式:SPDT 執(zhí)行器:Lever 電流額定值:5 A 電壓額定值 AC:250 V 電壓額定值 DC:30 V 功率額定值: 工作力:120 g IP 等級(jí):IP 67 NEMA 額定值: 端接類型:Wire 安裝:Panel
LM9820 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
LM9820CCWM 制造商:NSC 制造商全稱:National Semiconductor 功能描述:LM9810/20 10/12-Bit Image Sensor Processor Analog Front End
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*