6
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Electrical Characteristics
(Continued)
Note 9:
Typicals are at T
J
=T
A
=25°C, f
MCLK
= 12MHz, and represent most likely parametric norm.
Note 10:
Tested limits are guaranteed to National's AOQL (Average Outgoing Quality Level).
Note 11:
Full channel integral non-linearity error is defined as the deviation of the analog value, expressed in LSBs, from the straight line that best fits the actual transfer
function of the AFE.
Note 12:
The sensor’s maximum peak differential signal range is defined as the peak sensor output voltage for a white (full scale) image, with respect to the dark reference
level.
Note 13:
PGA Gain Error is the maximum difference between the measured gain for any PGA code and the ideal gain calculated using:
where
.
Note 14:
Full Channel INL and DNL are tested with CDS disabled, negative signal polarity, DOE = 0, and a single OS input with a gain register setting of 1 (000001b) and
an offset register setting of 0 (000000b).
Note 15:
The digital supply current (ID) does not include the load, data and switching frequency dependent current required to drive the digital output bus on pins (D7 - D0).
The current required to switch the digital data bus can be calculated from: Isw = 2*Nd*Psw*CL*V
D
/t
MCLK
where Nd is total number of data pins, Psw is the probability of
each data bit switching, CL is the capacitive loading on each data pin, V
D
is the digital supply voltage and t
MCLK
is the period of the MCLK input. For most applications, Nd
is 8, Psw is
≈
0.5, and V
D
is 5V, and the switching current can be calculated from: Isw = 40*CL/tMCLK. (With
example, if the capacitive load on each digital output pin (D7 - D0) is 20pF and the period of t
MCLK
is 1/12MHz or 83ns, then the digital switching current would be 9.6mA.
The calculated digital switching current will be drawn through the V
D
pin and should be considered as part of the total power budget for the LM9822.
D
at 3.3V, the equation becomes: Isw = 26.4*CL/t
MCLK
.) For
Note 16:
All specifications quoted in LSBs are based on 12 bit resolution.
V
WHITE
V
REF
V
RFT
CCD Output Signal
CIS Output Signal
V
WHIT
Black Level
GainPGA
V
V
---
G0
X----------------------------
+
=
X
G31
G0
–
(
)
32
31
-----
=