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參數(shù)資料
| 型號： | LMX2322 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | PLLatinumTM 2.0 GHz Frequency Synthesizer for RF Personal Communications |
| 中文描述： | PLLatinumTM 2.0千兆赫頻率合成射頻個人通信 |
| 文件頁數(shù)： | 2/14頁 |
| 文件大?。?/td> | 227K |
| 代理商： | LMX2322 |
LMX2322
Connection Diagram
Advance Information
Rev 1.6
9/24/1998
2
Vcc
CPo
GND
fin
Xfin
OSCin
LE
Data
Clock
CE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
NC
Vp
NC
NC
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
TSSOP 16
CSP 16 (TOP VIEW)
Vp
Vcc
CPo
GND
Xfin
fin
NC
Clock
Data
LE
CE
NC
NC
NC
NC
OSCin
Pin Description
Pin
No.
Pin
Name
I/O
Description
TSSOP
16
CSP 16
1
15
OSCin
I
Oscillator input. A CMOS inverting gate input. The input has a
Vcc/2 input threshold and can be driven from an external CMOS
or TTL logic gate. May also be used as a buffer for an externally
provided reference oscillator.
Power supply for charge pump. Must be > Vcc
Power supply voltage input. Input may range from 2.7V to 3.9V.
Bypass capacitors should be placed as close as possible to this
pin and be connected directly to the ground plane.
Internal charge pump output. For connection to a loop filter for
driving the voltage control input of an external oscillator.
Ground.
RF prescaler complimentary input. In single-ended mode, a
bypass capacitor should be placed as close as possible to this
pin and be connected directly to the ground plane. The LMX2322
can be driven differentially when a bypass capacitor is omitted.
RF prescaler input. Small signal input from the voltage
controlled oscillator.
High impedance CMOS Clock input. Data is clocked in on the
rising edge, into the various counters and registers.
Binary serial data input. Data entered MSB first. LSB is control
bit. High impedance CMOS input.
Load enable input. When Load Enable transitions HIGH, data is
loaded into either the N or R register (control bit dependent). See
timing diagram.
PLL Enable. A LOW on CE powers down the device
asynchronously and TRI-STATEs the charge pump output.
No Connect
3
4
1
2
Vp
Vcc
-
-
5
3
CPo
O
6
7
4
5
GND
Xfin
-
I
8
6
fin
I
9
8
Clock
I
10
9
Data
I
11
10
LE
I
12
11
CE
I
2,13,14,
15, 16
7,12,13
14, 16
NC
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LMX2332LSLDX | PLLatinumTM Low Power Dual Frequency Synthesizer for RF Personal Communications |
| LMX2330LSBX | PLLatinumTM Low Power Dual Frequency Synthesizer for RF Personal Communications |
| LMX2330LSLDX | PLLatinumTM Low Power Dual Frequency Synthesizer for RF Personal Communications |
| LMX2331LSLDX | PLLatinumTM Low Power Dual Frequency Synthesizer for RF Personal Communications |
| LMX2335 | PLLatinum Dual Frequency Synthesizer for RF Personal Communications(PLLatinum技術(shù)用于射頻個人通訊的雙通道頻率合成器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LMX2322 WAF | 制造商:Texas Instruments 功能描述: |
| LMX2322SLBX | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| LMX2323 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PLLatinum? 2.0 GHz Frequency Synthesizer for RF Personal Communications |
| LMX2323 WAF | 制造商:Texas Instruments 功能描述: |
| LMX2323TMX | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
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