參數(shù)資料
型號(hào)： LMX2470SLEX
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類(lèi)： XO, clock
英文描述： 2.6 GHz Delta-Sigma Fractional-N PLL with 800 MHz Integer-N PLL
中文描述： PLL FREQUENCY SYNTHESIZER, 2600 MHz, PQCC24
封裝： CSP-24
文件頁(yè)數(shù)： 15/36頁(yè)
文件大?。?/td> 453K
代理商： LMX2470SLEX
Bench Test Setups
20059369
Charge Pump Current Measurement Procedure
The above block diagram shows the test procedure for test-
ing the RF and IF charge pumps. These tests include abso-
lute current level, mismatch, and leakage. In order to mea-
sure the charge pump currents, a signal is applied to the high
frequency input pins. The reason for this is to guarantee that
the phase detector gets enough transitions in order to be
able to change states. If no signal is applied, it is possible
that the charge pump current reading will be low due to the
fact that the duty cycle is not 100%. The OSCin Pin is tied to
the supply. The charge pump currents can be measured by
simply programming the phase detector to the necessary
polarity. For instance, in order to measure the RF charge
pump current, a 10 MHz signal is applied to the FinRF pin.
The source current can be measured by setting the RF PLL
phase detector to a positive polarity, and the sink current can
be measured by setting the phase detector to a negative
polarity. The IF PLL currents can be measured in a similar
way. Note that the magnitude of the RF and IF PLL charge
pump currents are also controlled by the RF_CPG and IF-
_CPG bits. Once the charge pump currents are known, the
mismatch can be calculated as well. In order to measure
leakage currents, the charge pump current is set to a TRI-
STATE mode by enabling the counter reset bits. This is
RF_RST for the RF PLL and IF_RST for the IF PLL. The
table below shows a summary of the various charge pump
tests.
Current Test
RF Source
RF Sink
RF TRI-STATE
IF Source
IF Sink
IF TRI-STATE
RF_CPG
0 to 15
0 to 15
X
X
X
X
RF_CPP
0
1
X
X
X
X
RF_CPT
0
0
1
X
X
X
IF_CPG
X
X
X
0 to 1
0 to 1
X
IF_CPP
X
X
X
0
1
X
IF_CPT
X
X
X
0
0
1
L
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相關(guān)PDF資料
PDF描述
LMX2485 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL
LMX2485E 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL
LMX2485ESQ 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL
LMX2485ESQX 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL
LMX2485SQ 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LMX2470SLEX/NOPB 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類(lèi)型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
LMX2471 制造商:NSC 制造商全稱(chēng):National Semiconductor 功能描述:3.6 GHz Delta-Sigma Fractional-N PLL with 1.7 GHz Integer-N PLL
LMX2471 WAF 制造商:Texas Instruments 功能描述:
LMX2471SLEX 功能描述:IC PLL LP 3.6GHZ/1.7GHZ 24-CSP RoHS:否 類(lèi)別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類(lèi)型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無(wú)/無(wú) 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:*
LMX2471SLEX/NOPB 制造商:Texas Instruments 功能描述:PLL Dual 250MHz to 3600MHz 24-Pin LAM CSP T/R
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