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參數(shù)資料
| 型號(hào)： | LP61L256BV-12 |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | 32K X 8 Bit High SPEED LOW VCC CMOS SRAM |
| 中文描述： | 32K的× 8位高速CMOS SRAM的低虛擬通道連接 |
| 文件頁(yè)數(shù)： | 4/11頁(yè) |
| 文件大?。?/td> | 132K |
| 代理商： | LP61L256BV-12 |
LP61L256B Series
(August, 2001, Version 1.0)
4
AMIC Technology, Inc.
Truth Table
Mode
CE
OE
WE
I/O Operation
Supply Current
Standby
H
X
X
High Z
I
SB
, I
SB1
Output Disable
L
H
H
High Z
I
CC1
Read
L
L
H
D
OUT
I
CC1
Write
L
X
L
D
IN
I
CC1
Capacitance
(T
A
= 25
°
C, f = 1.0 MHz)
Symbol
Parameter
Min.
Max.
Unit
Conditions
C
IN
*
Input Capacitance
-
10
pF
V
IN
= 0 V
C
I/O
*
Input/Output Capacitance
-
10
pF
V
I/O
= 0 V
* These parameters are sampled and not 100% tested.
AC Characteristics
(T
A
= 0
°
C to + 70
°
C, VCC = 3.3V
±
10%)
LP61L256B-12
Symbol
Parameter
Min.
Max.
Unit
Read Cycle
t
RC
Read Cycle Time
12
-
ns
t
AA
Address Access Time
-
12
ns
t
ACE
Chip Enable Access Time
-
12
ns
t
OE
Output Enable to Output Valid
-
7
ns
t
CLZ
Chip Enable to Output in Low Z
2
-
ns
t
OLZ
Output Enable to Output in Low Z
2
-
ns
t
CHZ
Chip Disable to Output in High Z
0
7
ns
t
OHZ
Output Disable to Output in High Z
2
6
ns
t
OH
Output Hold from Address Change
2
-
ns
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PDF描述 |
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| LP61L256C | 32K X 8 BIT HIGH SPEED CMOS SRAM |
| LP61L256CS-15 | 32K X 8 BIT HIGH SPEED CMOS SRAM |
| LP61L256CS-12 | 32K X 8 BIT HIGH SPEED CMOS SRAM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LP61L256C | 制造商:AMICC 制造商全稱(chēng):AMIC Technology 功能描述:32K X 8 BIT HIGH SPEED CMOS SRAM |
| LP61L256CS-12 | 制造商:AMICC 制造商全稱(chēng):AMIC Technology 功能描述:32K X 8 BIT HIGH SPEED CMOS SRAM |
| LP61L256CS-15 | 制造商:AMICC 制造商全稱(chēng):AMIC Technology 功能描述:32K X 8 BIT HIGH SPEED CMOS SRAM |
| LP-61PMBT | 制造商:Polycase 功能描述:Enclosure, Box/Lid, Desktop, ABS,UL94-5VA, Black, 5.56x3.8x1.25 In, LP Series |
| LP-61PXXT | 制造商:Polycase 功能描述:Enclosure;Box/Lid;Desktop;ABS,UL94-5VA;Black;5.56x3.8x1.25 In;LP Series |
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