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參數(shù)資料
| 型號： | LP61L256BV-12 |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | 32K X 8 Bit High SPEED LOW VCC CMOS SRAM |
| 中文描述： | 32K的× 8位高速CMOS SRAM的低虛擬通道連接 |
| 文件頁數(shù)： | 8/11頁 |
| 文件大?。?/td> | 132K |
| 代理商： | LP61L256BV-12 |
LP61L256B Series
(August, 2001, Version 1.0)
8
AMIC Technology, Inc.
AC Test Conditions
Input Pulse Levels
0V - 3V
Input Rise and Fall Times
3 ns
Input and Current Timing Reference Levels
1.5V
Output Load
See Figures 1, 2 and 3
+3.3V
I/O
350
320
30pF*
* Including scope and jig.
+3.3V
I/O
350
320
5pF*
* Including scope and jig.
Z
O
=50
OUTPUT
R
L
=50
V
T
=1.5V
Figure 1. Output Load
Figure 2. Output Load for t
CLZ
,
t
OLZ
, t
CHZ
, t
OHZ
, t
WHZ
,
and t
OW
Figure 3. Output Load
Data Retention Characteristics
(T
A
= 0
°
C to 70
°
C)
Symbol
Parameter
Min.
Max.
Unit
Conditions
V
DR
VCC for Data Retention
2.0
3.6
V
CE
≥
VCC - 0.2V
I
CCDR
Data Retention Current
-
0.5
mA
VCC = 2V, CE
≥
VCC - 0.2V
V
IN
≥
VCC - 0.2V or
V
IN
≤
0.2V
t
CDR
Chip Disable to Data Retention Time
0
-
ns
See Retention Waveform
t
R
Operation Recovery Time
5
-
ms
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相關代理商/技術(shù)參數(shù) |
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|---|---|
| LP61L256C | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:32K X 8 BIT HIGH SPEED CMOS SRAM |
| LP61L256CS-12 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:32K X 8 BIT HIGH SPEED CMOS SRAM |
| LP61L256CS-15 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:32K X 8 BIT HIGH SPEED CMOS SRAM |
| LP-61PMBT | 制造商:Polycase 功能描述:Enclosure, Box/Lid, Desktop, ABS,UL94-5VA, Black, 5.56x3.8x1.25 In, LP Series |
| LP-61PXXT | 制造商:Polycase 功能描述:Enclosure;Box/Lid;Desktop;ABS,UL94-5VA;Black;5.56x3.8x1.25 In;LP Series |
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