參數(shù)資料
型號: LPC11U14FET48/201,
廠商: NXP Semiconductors
文件頁數(shù): 19/72頁
文件大?。?/td> 0K
描述: IC MCU 32BIT 32K 48TFBGA
產(chǎn)品培訓模塊: Code Density for LPC11xx
標準包裝: 490
系列: LPC11Uxx
核心處理器: ARM? Cortex?-M0
芯體尺寸: 32-位
速度: 50MHz
連通性: I²C,Microwire,智能卡,SPI,SSP,UART/USART,USB
外圍設備: 欠壓檢測/復位,POR,WDT
輸入/輸出數(shù): 40
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
RAM 容量: 6K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.6 V
數(shù)據(jù)轉換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 48-TFBGA
包裝: 托盤
其它名稱: 568-8578
LPC11U1X
All information provided in this document is subject to legal disclaimers.
NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 2.2 — 11 March 2014
26 of 72
NXP Semiconductors
LPC11U1x
32-bit ARM Cortex-M0 microcontroller
on-chip peripherals, allowing fine tuning of power consumption by eliminating all dynamic
power use in any peripherals that are not required for the application. Selected
peripherals have their own clock divider which provides even better power control.
7.16.5.1
Power profiles
The power consumption in Active and Sleep modes can be optimized for the application
through simple calls to the power profile. The power configuration routine configures the
LPC11U1x for one of the following power modes:
Default mode corresponding to power configuration after reset.
CPU performance mode corresponding to optimized processing capability.
Efficiency mode corresponding to optimized balance of current consumption and CPU
performance.
Low-current mode corresponding to lowest power consumption.
In addition, the power profile includes routines to select the optimal PLL settings for a
given system clock and PLL input clock.
Remark: When using the USB, configure the LPC11U1x in Default mode.
7.16.5.2
Sleep mode
When Sleep mode is entered, the clock to the core is stopped. Resumption from the Sleep
mode does not need any special sequence but re-enabling the clock to the ARM core.
In Sleep mode, execution of instructions is suspended until either a reset or interrupt
occurs. Peripheral functions continue operation during Sleep mode and may generate
interrupts to cause the processor to resume execution. Sleep mode eliminates dynamic
power used by the processor itself, memory systems and related controllers, and internal
buses.
7.16.5.3
Deep-sleep mode
In Deep-sleep mode, the LPC11U1x is in Sleep-mode and all peripheral clocks and all
clock sources are off with the exception of the IRC. The IRC output is disabled unless the
IRC is selected as input to the watchdog timer. In addition all analog blocks are shut down
and the flash is in stand-by mode. In Deep-sleep mode, the user has the option to keep
the watchdog oscillator and the BOD circuit running for self-timed wake-up and BOD
protection.
The LPC11U1x can wake up from Deep-sleep mode via reset, selected GPIO pins, a
watchdog timer interrupt, or an interrupt generating USB port activity.
Deep-sleep mode saves power and allows for short wake-up times.
7.16.5.4
Power-down mode
In Power-down mode, the LPC11U1x is in Sleep-mode and all peripheral clocks and all
clock sources are off with the exception of watchdog oscillator if selected. In addition all
analog blocks and the flash are shut down. In Power-down mode, the user has the option
to keep the BOD circuit running for BOD protection.
The LPC11U1x can wake up from Power-down mode via reset, selected GPIO pins, a
watchdog timer interrupt, or an interrupt generating USB port activity.
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