參數(shù)資料
型號(hào): LPC11U14FET48/201,
廠商: NXP Semiconductors
文件頁(yè)數(shù): 34/72頁(yè)
文件大小: 0K
描述: IC MCU 32BIT 32K 48TFBGA
產(chǎn)品培訓(xùn)模塊: Code Density for LPC11xx
標(biāo)準(zhǔn)包裝: 490
系列: LPC11Uxx
核心處理器: ARM? Cortex?-M0
芯體尺寸: 32-位
速度: 50MHz
連通性: I²C,Microwire,智能卡,SPI,SSP,UART/USART,USB
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,WDT
輸入/輸出數(shù): 40
程序存儲(chǔ)器容量: 32KB(32K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 6K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 48-TFBGA
包裝: 托盤
其它名稱: 568-8578
LPC11U1X
All information provided in this document is subject to legal disclaimers.
NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 2.2 — 11 March 2014
4 of 72
NXP Semiconductors
LPC11U1x
32-bit ARM Cortex-M0 microcontroller
5.
Block diagram
(1) DSR, RI, CT32B0_CAP1 are not available on HVQFN33 packages.
(2) CT32B1_CAP1 is available only on the TFBGA48package.
Fig 1.
Block diagram
SRAM
6 kB
ARM
CORTEX-M0
TEST/DEBUG
INTERFACE
FLASH
16/24/32 kB
HIGH-SPEED
GPIO
AHB TO APB
BRIDGE
CLOCK
GENERATION,
POWER CONTROL,
SYSTEM
FUNCTIONS
RESET
SWD, JTAG
LPC11U12/13/14
slave
ROM
16 kB
slave
AHB-LITE BUS
GPIO ports 0/1
CLKOUT
IRC, WDO
SYSTEM OSCILLATOR
POR
PLL0
USB PLL
BOD
10-bit ADC
USART/
SMARTCARD INTERFACE
AD[7:0]
RXD
TXD
CTS, RTS, DTR
SCLK
GPIO PIN INTERRUPTS
32-bit COUNTER/TIMER 0
CT32B0_MAT[3:0]
CT32B0_CAP[1:0](1)
32-bit COUNTER/TIMER 1
CT32B1_MAT[3:0]
CT32B1_CAP[1:0](2)
DCD, DSR(1), RI(1)
16-bit COUNTER/TIMER 1
WINDOWED WATCHDOG
TIMER
GPIO GROUP0 INTERRUPT
CT16B1_MAT[1:0]
16-bit COUNTER/TIMER 0
CT16B0_MAT[1:0]
CT16B0_CAP0
CT16B1_CAP0
GPIO pins
GPIO GROUP1 INTERRUPT
GPIO pins
system bus
SSP0
SCK0, SSEL0,
MISO0, MOSI0
SSP1
SCK1, SSEL1,
MISO1, MOSI1
I2C-BUS
IOCON
SYSTEM CONTROL
PMU
SCL, SDA
XTALIN XTALOUT
USB DEVICE
CONTROLLER
USB_DP
USB_DM
USB_VBUS
USB_FTOGGLE,
USB_CONNECT
002aaf885
master
slave
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