參數(shù)資料
型號: LPC1224FBD64/101,1
廠商: NXP Semiconductors
文件頁數(shù): 39/61頁
文件大?。?/td> 0K
描述: MCU 32BIT 32K FLASH 4K 64-LQFP
產(chǎn)品培訓(xùn)模塊: LPC1200 Series for Industrial Control
標(biāo)準包裝: 160
系列: LPC1200
核心處理器: ARM? Cortex?-M0
芯體尺寸: 32-位
速度: 45MHz
連通性: I²C,IrDA,Microwire,SPI,SSI,SSP,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,DMA,POR,WDT
輸入/輸出數(shù): 55
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
RAM 容量: 4K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-LQFP
包裝: 托盤
其它名稱: 568-5155
LPC1224FBD64/201
LPC1224FBD64/201,1
LPC122X
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 26 August 2011
44 of 61
NXP Semiconductors
LPC122x
32-bit ARM Cortex-M0 microcontroller
10.5 BOD static characteristics
[1]
Interrupt levels are selected by writing the level value to the BOD control register BODCTRL, see LPC122x
user manual.
Table 10.
BOD static characteristics[1]
Tamb =25 C.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Vth
threshold voltage
interrupt level 1
assertion
-
2.25
-
V
de-assertion
-
2.39
-
V
interrupt level 2
assertion
-
2.54
-
V
de-assertion
-
2.67
-
V
interrupt level 3
assertion
-
2.83
-
V
de-assertion
-
2.93
-
V
reset level 1
assertion
-
2.04
-
V
de-assertion
-
2.18
-
V
reset level 2
assertion
-
2.34
-
V
de-assertion
-
2.47
-
V
reset level 3
assertion
-
2.62
-
V
de-assertion
-
2.76
-
V
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