參數(shù)資料
型號(hào): LPC1313FHN33,551
廠商: NXP Semiconductors
文件頁(yè)數(shù): 12/74頁(yè)
文件大?。?/td> 0K
描述: IC MCU 32BIT 32KB FLASH 33HVQFN
產(chǎn)品培訓(xùn)模塊: LPCXpresso
特色產(chǎn)品: LPC1300 Series Cortex-M3 MCUs
標(biāo)準(zhǔn)包裝: 260
系列: LPC13xx
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 72MHz
連通性: I²C,Microwire,SPI,SSI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,WDT
輸入/輸出數(shù): 28
程序存儲(chǔ)器容量: 32KB(32K x 8)
程序存儲(chǔ)器類(lèi)型: 閃存
RAM 容量: 8K x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 33-VQFN 裸露焊盤(pán),33-HVQFN,33-SQFN,33-DHVQFN
包裝: 托盤(pán)
配用: 568-4918-ND - KIT DEV FOR LPC1313
622-1005-ND - USB IN-CIRCUIT PROG ARM7 LPC2K
其它名稱: 568-4913
935289653551
LPC1311_13_42_43
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 5 — 6 June 2012
2 of 74
NXP Semiconductors
LPC1311/13/42/43
32-bit ARM Cortex-M3 microcontroller
Serial interfaces:
USB 2.0 full-speed device controller with on-chip PHY for device (LPC1342/43
only).
UART with fractional baud rate generation, modem, internal FIFO, and
RS-485/EIA-485 support.
SSP controller with FIFO and multi-protocol capabilities.
Additional SSP controller on LPC1313FBD48/01.
I2C-bus interface supporting full I2C-bus specification and Fast-mode Plus with a
data rate of 1 Mbit/s with multiple address recognition and monitor mode.
Other peripherals:
Up to 42 General Purpose I/O (GPIO) pins with configurable pull-up/pull-down
resistors.
Four general purpose counter/timers with a total of four capture inputs and 13
match outputs.
Programmable WatchDog Timer (WDT).
Programmable Windowed Watchdog Timer (WWDT) on LPC1311/01 and
LPC1313/01.
System tick timer.
Serial Wire Debug and Serial Wire Trace port.
High-current output driver (20 mA) on one pin.
High-current sink drivers (20 mA) on two I2C-bus pins in Fast-mode Plus.
Integrated PMU (Power Management Unit) to minimize power consumption during
Sleep, Deep-sleep, and Deep power-down modes.
Power profiles residing in boot ROM allowing to optimize performance and minimize
power consumption for any given application through one simple function call.
(LPC1300L series, on LPC1311/01 and LPC1313/01 only.)
Three reduced power modes: Sleep, Deep-sleep, and Deep power-down.
Single power supply (2.0 V to 3.6 V).
10-bit ADC with input multiplexing among 8 pins.
GPIO pins can be used as edge and level sensitive interrupt sources.
Clock output function with divider that can reflect the system oscillator clock, IRC
clock, CPU clock, or the watchdog clock.
Processor wake-up from Deep-sleep mode via a dedicated start logic using up to 40 of
the functional pins.
Brownout detect with four separate thresholds for interrupt and one threshold for
forced reset (four thresholds for forced reset on the LPC1311/01 and LPC1313/01
parts).
Power-On Reset (POR).
Integrated oscillator with an operating range of 1 MHz to 25 MHz.
12 MHz internal RC oscillator trimmed to 1 % accuracy over the entire temperature
and voltage range that can optionally be used as a system clock.
Programmable watchdog oscillator with a frequency range of 7.8 kHz to 1.8 MHz.
System PLL allows CPU operation up to the maximum CPU rate without the need for a
high-frequency crystal. May be run from the system oscillator or the internal RC
oscillator.
For USB (LPC1342/43), a second, dedicated PLL is provided.
Code Read Protection (CRP) with different security levels.
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