參數(shù)資料
型號: LPC2106BBD48
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: Single-chip 32-bit microcontrollers; 128 kB ISP/IAP Flash with 64 kB/32 kB/16 kB RAM
中文描述: 32-BIT, FLASH, 60 MHz, RISC MICROCONTROLLER, PQFP48
封裝: 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT313-2, LQFP-48
文件頁數(shù): 22/32頁
文件大?。?/td> 155K
代理商: LPC2106BBD48
Philips Semiconductors
LPC2104/2105/2106
Single-chip 32-bit microcontrollers
Product data
Rev. 04 — 05 February 2004
22 of 32
9397 750 12792
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
6.18.1
Embedded ICE
Standard ARM EmbeddedICE logic provides on-chip debug support. The debugging
of the target system requires a host computer running the debugger software and an
EmbeddedICE protocol convertor. EmbeddedICE protocol convertor converts the
Remote Debug Protocol commands to the JTAG data needed to access the ARM
core.
The ARM core has a Debug Communication Channel function in-built. The debug
communication channel allows a program running on the target to communicate with
the host debugger or another separate host without stopping the program flow or
even entering the debug state. The debug communication channel is accessed as a
co-processor 14 by the program running on the ARM7TDMI-S core. The debug
communication channel allows the JTAG port to be used for sending and receiving
data without affecting the normal program flow. The debug communication channel
data and control registers are mapped in to addresses in the EmbeddedICE logic.
6.18.2
Embedded trace
Since the LPC2104, LPC2105 and LPC2106 have significant amounts of on-chip
memory, it is not possible to determine how the processor core is operating simply by
observing the external pins. The Embedded Trace Macrocell provides real-time trace
capability for deeply embedded processor cores. It outputs information about
processor execution to the trace port.
The ETM is connected directly to the ARM core and not to the main AMBA system
bus. It compresses the trace information and exports it through a narrow trace port.
An external trace port analyzer must capture the trace information under software
debugger control. Instruction trace (or PC trace) shows the flow of execution of the
processor and provides a list of all the instructions that were executed. Instruction
trace is significantly compressed by only broadcasting branch addresses as well as a
set of status signals that indicate the pipeline status on a cycle by cycle basis. Trace
information generation can be controlled by selecting the trigger resource. Trigger
resources include address comparators, counters and sequencers. Since trace
information is compressed the software debugger requires a static image of the code
being executed. Self-modifying code can not be traced because of this restriction.
6.18.3
RealMonitor
RealMonitor is a configurable software module, developed by ARM Inc., which
enables real time debug. It is a lightweight debug monitor that runs in the background
while users debug their foreground application. It communicates with the host using
the DCC (Debug Communications Channel), which is present in the EmbeddedICE
logic. The LPC2104, LPC2105 and LPC2106 contain a specific configuration of
RealMonitor software programmed into the on-chip Flash memory.
相關(guān)PDF資料
PDF描述
LPC2104 Single-chip 32-bit microcontrollers; 128 kB ISP/IAP Flash with 64 kB/32 kB/16 kB RAM
LPC2105 Single-chip 32-bit microcontrollers; 128 kB ISP/IAP Flash with 64 kB/32 kB/16 kB RAM
LPC2106 Single-chip 32-bit microcontrollers; 128 kB ISP/IAP Flash with 64 kB/32 kB/16 kB RAM
LPC2119 CLAMP
LPC2129 SPACER
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