參數(shù)資料
型號(hào): LPC2388FBD144
廠商: NXP Semiconductors N.V.
元件分類: 數(shù)學(xué)處理器
英文描述: Single-chip 16-bit-32-bit micro; 512 kB flash with ISP-IAP, Ethernet, USB 2.0 device-host-OTG, CAN, and 10-bit ADC-DAC
封裝: LPC2388FBD144<SOT486-1 (LQFP144)|<<http://www.nxp.com/packages/SOT486-1.html<1<Always Pb-free,;
文件頁數(shù): 5/72頁
文件大?。?/td> 1469K
代理商: LPC2388FBD144
LPC2388
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 13 July 2010
5 of 72
NXP Semiconductors
LPC2388
Single-chip 16-bit/32-bit microcontroller
6. Pinning information
6.1 Pinning
6.2 Pin description
Fig 2.
LPC2388 pinning
LPC2388FBD144
108
3
7
1
1
73
1
36
002aad333
Table 3.
Symbol
P0[0] to P0[31]
Pin description
Pin
Type
I/O
Description
Port 0:
Port 0 is a 32-bit I/O port with individual direction controls for each bit. The
operation of port 0 pins depends upon the pin function selected via the Pin Connect
block.
P0[0] —
General purpose digital input/output pin.
RD1 —
CAN1 receiver input.
TXD3 —
Transmitter output for UART3.
SDA1 —
I
2
C1 data input/output (this is not an open-drain pin).
P0[1] —
General purpose digital input/output pin.
TD1 —
CAN1 transmitter output.
RXD3 —
Receiver input for UART3.
SCL1 —
I
2
C1 clock input/output (this is not an open-drain pin).
P0[2] —
General purpose digital input/output pin.
TXD0 —
Transmitter output for UART0.
P0[3] —
General purpose digital input/output pin.
RXD0 —
Receiver input for UART0.
P0[4] —
General purpose digital input/output pin.
I2SRX_CLK —
Receive Clock. It is driven by the master and received by the slave.
Corresponds to the signal SCK in the
I
2
S-bus specification
.
RD2 —
CAN2 receiver input.
CAP2[0] —
Capture input for Timer 2, channel 0.
P0[0]/RD1/TXD/
SDA1
66
[1]
I/O
I
O
I/O
I/O
O
I
I/O
I/O
O
I/O
I
I/O
I/O
P0[1]/TD1/RXD3/
SCL1
67
[1]
P0[2]/TXD0
141
[1]
P0[3]/RXD0
142
[1]
P0[4]/
I2SRX_CLK/
RD2/CAP2[0]
116
[1]
I
I
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