LPC2470_0
NXP B.V. 2007. All rights reserved.
Preliminary data sheet
Rev. 00.01 — 5 October 2007
24 of 72
NXP Semiconductors
LPC2470
Fast communication chip
[1]
5 V tolerant pad providing digital I/O functions with TTL levels and hysteresis.
[2]
5 V tolerant pad providing digital I/O functions (with TTL levels and hysteresis) and analog input. When configured as a ADC input,
digital section of the pad is disabled.
[3]
5 V tolerant pad providing digital I/O with TTL levels and hysteresis and analog output function. When configured as the DAC output,
digital section of the pad is disabled.
[4]
Open-drain 5 V tolerant digital I/O I
2
C-bus 400 kHz specification compatible pad. It requires an external pull-up to provide output
functionality. When power is switched off, this pin connected to the I
2
C-bus is floating and does not disturb the I
2
C lines.
[5]
Pad provides digital I/O and USB functions. It is designed in accordance with the
USB specification, revision 2.0
(Full-speed and
Low-speed mode only).
[6]
5 V tolerant pad with 5 ns glitch filter providing digital I/O functions with TTL levels and hysteresis.
RESET
35
[7]
M2
[7]
I
external reset input:
A LOW on this pin resets the device, causing I/O
ports and peripherals to take on their default states, and processor
execution to begin at address 0. TTL with hysteresis, 5 V tolerant.
Input to the oscillator circuit and internal clock generator circuits.
Output from the oscillator amplifier.
Input to the RTC oscillator circuit.
Output from the RTC oscillator circuit.
ground:
0 V reference for the digital IO pins.
XTAL1
XTAL2
RTCX1
RTCX2
V
SSIO
44
[8]
46
[8]
34
[8]
36
[8]
33, 63,
77, 93,
114,
133,
148,
169,
189,
200
[9]
32, 84,
172
[9]
22
[10]
M4
[8]
N4
[8]
K2
[8]
L2
[8]
L3, T5,
R9, P12,
N16,
H14,
E15,
A12, B6,
A2
[9]
I
O
I
O
I
V
SSCORE
K4, P10,
D12
[9]
J2
[10]
I
ground:
0 V reference for the core.
V
SSA
I
analog ground:
0 V reference. This should nominally be the same
voltage as V
SS
, but should be isolated to minimize noise and error.
3.3 V supply voltage:
This is the power supply voltage for the I/O ports.
V
DD(3V3)
15, 60,
71, 89,
112,
125,
146,
165,
181,
198
[11]
30, 117,
141
[12]
26, 86,
174
[13]
20
[14]
G3, P6,
P8, U13,
P17,
K16,
C17,
B13, C9,
D7
[11]
I
NC
J4, L14,
G14
[12]
H4, P11,
D11
[13]
G4
[14]
I
Not Connected pins:
These pins must be left unconnected (floating).
V
DD(DCDC)(3V3)
I
3.3 V DC-to-DC converter supply voltage:
This is the power supply for
the on-chip DC-to-DC converter.
analog 3.3 V pad supply voltage:
This should be nominally the same
voltage as V
DD(3V3)
but should be isolated to minimize noise and error.
This voltage is used to power the ADC and DAC.
ADC reference:
This should be nominally the same voltage as V
DD(3V3)
but should be isolated to minimize noise and error. The level on this pin is
used as a reference for ADC and DAC.
RTC power supply:
3.3 V on this pin supplies the power to the RTC
peripheral.
V
DDA
I
VREF
24
[14]
K1
[14]
I
VBAT
38
[14]
M3
[14]
I
Table 4.
Symbol
Pin description
…continued
Pin
Ball
Type
Description