參數(shù)資料
型號: LPC3250FET296/01,5
廠商: NXP Semiconductors
文件頁數(shù): 38/57頁
文件大小: 0K
描述: IC ARM9 MCU 256K 296-TFBGA
標準包裝: 126
系列: LPC3200
核心處理器: ARM9
芯體尺寸: 16/32-位
速度: 266MHz
連通性: EBI/EMI,以太網(wǎng),I²C,IrDA,Microwire,SPI,SSI,SSP,UART/USART,USB OTG
外圍設備: DMA,I²S,LCD,電機控制 PWM,PWM,WDT
輸入/輸出數(shù): 51
程序存儲器類型: ROMless
RAM 容量: 256K x 8
電壓 - 電源 (Vcc/Vdd): 0.9 V ~ 3.6 V
數(shù)據(jù)轉換器: A/D 3x10b
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 296-TFBGA
包裝: 托盤
其它名稱: 568-4962
935290766551
LPC3220_30_40_50
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 20 October 2011
43 of 79
NXP Semiconductors
LPC3220/30/40/50
16/32-bit ARM microcontrollers
set LOW on match
set HIGH on match
toggle on match
do nothing on match
7.9.6 High-speed timer
The high-speed timer block is clocked by the main peripheral clock. The clock is first
divided down in a 16-bit programmable pre-scale counter which clocks a 32-bit
timer/counter.
The high-speed timer includes three match registers that are compared to the
timer/counter value. A match can generate an interrupt and cause the timer/counter to
either continue to run, stop, or be reset. The high-speed timer also includes two capture
registers that can take a snapshot of the timer/counter value when an input signal
transitions. A capture event may also generate an interrupt.
7.9.6.1
Features
32-bit timer/counter with programmable 16-bit pre-scaler.
Counter or timer operation.
Two 32-bit capture registers.
Three 32-bit match registers that allow:
Continuous operation with optional interrupt generation on match.
Stop timer on match with optional interrupt generation.
Reset timer on match with optional interrupt generation.
Pause control to stop counting when core is in debug state.
7.9.7 Pulse Width Modulators (PWMs)
The LPC3220/30/40/50 provides two simple PWMs. They are clocked separately by either
the main peripheral clock or the 32 kHz RTC clock. Both PWMs have a duty cycle
programmable in 255 steps.
7.9.7.1
Features
Clocked by the main peripheral clock or the 32 kHz RTC clock.
Programmable 4-bit pre-scaler.
Duty cycle programmable in 255 steps.
Output frequency up to 50 kHz when using a 13 MHz peripheral clock.
7.9.8 Motor control pulse width modulator
The Motor Control PWM (MCPWM) provides a set of features for three-phase AC and DC
motor control applications in a single peripheral. The MCPWM can also be configured for
use in other generalized timing, counting, capture, and compare applications.
7.9.8.1
Features
32-bit timer
32-bit period register
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