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參數(shù)資料
| 型號： | LRS1311 |
| 英文描述： | SRAM/EEPROM |
| 中文描述： | 的SRAM / EEPROM的 |
| 文件頁數(shù)： | 15/43頁 |
| 文件大?。?/td> | 1326K |
| 代理商： | LRS1311 |
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LRS1382
13
6. Status Register Definition
Status Register Definition
R
12
R
15
R
14
R
13
R
11
R
10
R
9
R
8
WSMS
7
BESS
6
BEFCES
5
PBPS
4
VPPS
3
PBPSS
2
DPS
1
R
0
SR.15 - SR.8 = RESERVED FOR FUTURE
ENHANCEMENTS (R)
SR.7 = WRITE STATE MACHINE STATUS (WSMS)
1 = Ready
0 = Busy
SR.6 = BLOCK ERASE SUSPEND STATUS (BESS)
1 = Block Erase Suspended
0 = Block Erase in Progress/Completed
SR.5 = BLOCK ERASE AND FULL CHIP ERASE
STATUS (BEFCES)
1 = Error in Block Erase or Full Chip Erase
0 = Successful Block Erase or Full Chip Erase
SR.4 = (PAGE BUFFER) PROGRAM STATUS (PBPS)
1 = Error in (Page Buffer) Program
0 = Successful (Page Buffer) Program
SR.3 = F-V
PP
STATUS (VPPS)
1 = F-V
PP
LOW Detect, Operation Abort
0 = F-V
PP
OK
SR.2 = (PAGE BUFFER) PROGRAM SUSPEND
STATUS (PBPSS)
1 = (Page Buffer) Program Suspended
0 = (Page Buffer) Program in Progress/Completed
SR.1 = DEVICE PROTECT STATUS (DPS)
1 = Erase or Program Attempted on a
Locked Block, Operation Abort
0 = Unlocked
SR.0 = RESERVED FOR FUTURE ENHANCEMENTS (R)
Notes:
Status Register indicates the status of the partition, not WSM
(Write State Machine). Even if the SR.7 is “1”, the WSM may
be occupied by the other partition when the device is set to 2, 3
or 4 partitions configuration.
Check SR.7 or F-RY/BY to determine block erase, full chip
erase, (page buffer) program completion. SR.6 - SR.1 are
invalid while SR.7= “0”.
If both SR.5 and SR.4 are “1”s after a block erase, full chip
erase, (page buffer) program, set/clear block lock bit, set block
lock-down bit or set partition configuration register attempt, an
improper command sequence was entered.
SR.3 does not provide a continuous indication of F-V
PP
level.
The WSM interrogates and indicates the F-V
PP
level only after
Block Erase, Full Chip Erase, (Page Buffer) Program com-
mand sequences. SR.3 is not guaranteed to report accurate
feedback when F-V
PP
≠
V
PPH1/2
or V
PPLK
.
SR.1 does not provide a continuous indication of block lock
bit. The WSM interrogates the block lock bit only after Block
Erase, Full Chip Erase, (Page Buffer) Program command
sequences. It informs the system, depending on the attempted
operation, if the block lock bit is set. Reading the block lock
configuration codes after writing the Read Identifier Codes
command indicates block lock bit status.
SR.15 - SR.8 and SR.0 are reserved for future use and should
be masked out when polling the status register.
相關PDF資料 |
PDF描述 |
|---|---|
| LRS1320A | SRAM/EEPROM |
| LRS1329A | MIXED MEMORY|SRAM+EEPROM|HYBRID|BGA|72PIN|PLASTIC |
| LRS1348 | Flash ROM |
| LRS1360 | Flash ROM |
| LRS1360C | MIXED MEMORY|SRAM+EEPROM|HYBRID|BGA|72PIN|PLASTIC |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LRS1320A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SRAM/EEPROM |
| LRS1329 | 制造商:SHARP 制造商全稱:Sharp Electrionic Components 功能描述:Stacked Chip 16M Flash and 2M SRAM |
| LRS1329A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MIXED MEMORY|SRAM+EEPROM|HYBRID|BGA|72PIN|PLASTIC |
| LRS1331 | 制造商:Sharp Microelectronics Corporation 功能描述:COMBO 1MX16 FLASH + 256KX16 SRAM 2.7V TO 3.6V 72FBGA - Trays |
| LRS1337 | 制造商:Sharp Microelectronics Corporation 功能描述:32M (2MX16) FLASH, 4M (256KX16) SRAM, 3V, CSP72 - Trays |
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