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| 型號： | LT1721IS#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 13/28頁 |
| 文件大小： | 0K |
| 描述： | IC COMP R-RINOUT QUAD 16-SOIC |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 系列： | UltraFast™ |
| 類型： | 通用 |
| 元件數(shù)： | 4 |
| 輸出類型： | CMOS，滿擺幅，TTL |
| 電壓 - 電源，單路/雙路(±)： | 2.7 V ~ 6 V |
| 電壓 - 輸入偏移（最小值）： | 3mV @ 5V |
| 電流 - 輸入偏壓（最小值）： | 6µA @ 5V |
| 電流 - 輸出（標(biāo)準(zhǔn)）： | 20mA |
| 電流 - 靜態(tài)（最大值）： | 7mA |
| CMRR, PSRR（標(biāo)準(zhǔn)）： | 70dB CMRR，80dB PSRR |
| 傳輸延遲（最大）： | 10ns |
| 磁滯： | 7mV |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 安裝類型： | 表面貼裝 |
| 包裝： | 管件 |
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LT1720/LT1721
20
17201fc
You don’t need expensive equipment to conrm the actual
overall performance of this circuit. All you need is a respect-
able waveform generator (capable of >~100kHz), a splitter, a
varietyofcablelengthsanda20MHzor60MHzoscilloscope.
Split a single pulse source into different cable lengths and
then into the delay detector, feeding the longer cable into
the Y input (see Figure 15). A 6 foot cable length difference
will create a ~9.2ns delay (using 66% propagation speed
RG-58 cable), and should result in easily measured 1.70μs
output pulses. A 12 foot cable length difference will result
in ~18.4ns delay and 2.07μs output pulses. The difference
APPLICATIONS INFORMATION
of your circuit (see Equation (3)). Shorter cable length dif-
ferences can be used to get a plot of circuit performance
down to 1.5ns (if any), which can then later be used as a
lookupreferencewhenyouhavemovedfromquantifyingthe
circuit to using the circuit. (Note there is a slight aberration
in performance below 10ns. See Figure 14.) As a nal check,
feed the circuit with identical cable lengths and check that
it is not producing any output pulses.
10ns Triple Overlap Generator
The circuit of Figure 16 utilizes an LT1721 to generate three
overlapping outputs whose pulse edges are separated by
10ns as shown. The time constant is set by the RC net-
work on the output of comparator A. Comparator B and D
trip at xed percentages of the exponential voltage decay
across the capacitor. The 4.22kΩ feed-forward to the C
comparator’s inverting input keeps the delay differences
the same in each direction despite the exponential nature
of the RC network’s voltage.
There is a 15ns delay to the rst edge in both directions,
due to the 4.5ns delay of two LT1721 comparators, plus 6ns
delay in the RC network. This starting delay is shortened
somewhat if the pulse was shorter than 40ns because the
RC network will not have fully settled; however, the 10ns
edge separations stay constant.
The values shown utilize only the lowest 75% of the supply
voltage span, which allows it to work down to 2.7V supply.
The delay differences grow a couple nanoseconds from
5V to 2.7V supply due to the xed VOL/VOH drops which
grow as a percentage at low supply voltage. To keep this
effect to a minimum, the 1kΩ pull-up on comparator A
provides equal loading in either state.
Fast Waveform Sampler
Figure 17 uses a diode-bridge-type switch for clean, fast
waveform sampling. The diode bridge, because of its
inherent symmetry, provides lower AC errors than other
semiconductor-based switching technologies. This circuit
features 20dB of gain, 10MHz full power bandwidth and
100μV/°C baseline uncertainty. Switching delay is less
than 15ns and the minimum sampling window width for
full power response is 30ns.
Figure 14. Log Pulse Stretcher Output Pulse vs Input Pulse
tPULSE (ns)
t OUT
STRETCHED
(μs)
14
12
10
8
6
4
2
0
1
100
1000
10000
17201 F14
10
MEASURED
EQUATION 1
Figure 15. RG-58 Cable with Velocity of Propogation = 66%;
Delay at Y = (n – 1) 1.54ns
SPLITTER
2V
0V
CIRCUIT OF
FIGURE 12
n FOOT CABLE
1 FOOT CABLE
NANOSECOND
INPUT RANGE
MICROSECOND
OUTPUT RANGE
X
Y
L
tOUT
(SEE TEXT)
17201 F15
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