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參數(shù)資料
| 型號： | LT3024EDE |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 基準電壓源/電流源 |
| 英文描述： | Dual 100mA/500mA Low Dropout, Low Noise, Micropower Regulator |
| 中文描述： | DUAL OUTPUT, ADJUSTABLE POSITIVE LDO REGULATOR, PDSO12 |
| 封裝： | 4 X 3 MM, 0.75 MM HEIGHT, PLASTIC, MO-229WGED, DFN-12 |
| 文件頁數(shù)： | 11/16頁 |
| 文件大?。?/td> | 493K |
| 代理商： | LT3024EDE |
11
LT3024
3024f
APPLICATIOU
the low quiescent current, the LT3024 regulator incorpo-
rates several protection features which make it ideal for
use in battery-powered systems. The device is protected
against both reverse input and reverse output voltages. In
battery backup applications where the output can be held
up by a backup battery when the input is pulled to ground,
the LT3024 acts like it has a diode in series with its output
and prevents reverse current flow. Additionally, in dual
supply applications where the regulator load is returned to
a negative supply, the output can be pulled below ground
by as much as 20V and still allow the device to start and
operate.
W
U
U
Figure 1. Adjustable Operation
IN
3024 F01
R2
LT3024
OUT1/OUT2
V
IN
V
OUT
ADJ1/ADJ2
GND
R1
+
V
V
R
R
I
R
V
V
I
nA
OUT
ADJ
ADJ
ADJ
OUTPUT RANGE = 1.22V TO 20V
=
+
+
(
1
)( )
=
=
°
1 22
.
1
2
2
1 22
30
AT 25 C
Adjustable Operation
The LT3024 has an output voltage range of 1.22V to 20V.
The output voltage is set by the ratio of two external resis-
tors as shown in Figure 1. The device servos the output to
maintain the corresponding ADJ pin voltage at 1.22V ref-
erenced to ground. The current in R1 is then equal to
1.22V/R1 and the current in R2 is the current in R1 plus the
ADJ pin bias current. The ADJ pin bias current, 30nA at
25
°
C, flows through R2 into the ADJ pin. The output volt-
age can be calculated using the formula in Figure 1. The
value of R1 should be no greater than 250k to minimize
errors in the output voltage caused by the ADJ pin bias
current. Note that in shutdown the output is turned off and
the divider current will be zero. Curves of ADJ Pin Voltage
vs Temperature and ADJ Pin Bias Current vs Temperature
appear in the Typical Performance Characteristics.
The device is tested and specified with the ADJ pin tied to
the corresponding OUT pin for an output voltage of 1.22V.
Specifications for output voltages greater than 1.22V will
be proportional to the ratio of the desired output voltage
to 1.22V: V
OUT
/1.22V. For example, load regulation on
Output 2 for an output current change of 1mA to 100mA
is –1mV typical at V
OUT
= 1.22V. At V
OUT
= 12V, load
regulation is:
(12V/1.22V)(–1mV) = –9.8mV
Bypass Capacitance and Low Noise Performance
The LT3024 regulator may be used with the addition of a
bypass capacitor from V
OUT
to the corresponding BYP pin
to lower output voltage noise. A good quality low leakage
capacitor is recommended. This capacitor will bypass the
reference of the regulator, providing a low frequency noise
pole. The noise pole provided by this bypass capacitor will
lower the output voltage noise to as low as 20
μ
V
RMS
with
the addition of a 0.01
μ
F bypass capacitor. Using a bypass
capacitor has the added benefit of improving transient
response. With no bypass capacitor and a 10
μ
F output
capacitor, a 10mA to 100mA load step on Output 2 will
settle to within 1% of its final value in less than 100
μ
s. With
the addition of a 0.01
μ
F bypass capacitor, the output will
stay within 1% for the same load step. Both outputs exhibit
this improvement in transient response (see Transient
Reponse in Typical Performance Characteristics section).
However, regulator start-up time is inversely proportional
to the size of the bypass capacitor, slowing to 15ms with
a 0.01
μ
F bypass capacitor and 10
μ
F output capacitor.
Output Capacitance and Transient Response
The LT3024 regulator is designed to be stable with a wide
range of output capacitors. The ESR of the output capaci-
tor affects stability, most notably with small capacitors.
A minimum output capacitor of 1
μ
F with an ESR of 3
or
less is recommended for Output 2 to prevent oscillations.
A minimum output capacitor of 3.3
μ
F with an ESR of 3
or less is recommended for Output 1. The LT3024 is a
micropower device and output transient response will be
a function of output capacitance. Larger values of output
capacitance decrease the peak deviations and provide
improved transient response for larger load current
changes. Bypass capacitors, used to decouple individual
components powered by the LT3024, will increase the
effective output capacitor value. With larger capacitors
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| LT3024EDE#PBF | 功能描述:IC REG LDO ADJ .5A/.1A 12-DFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 線性 系列:- 標準包裝:1 系列:- 穩(wěn)壓器拓撲結(jié)構(gòu):正，固定式 輸出電壓:8V 輸入電壓:10.5 V ~ 23 V 電壓 - 壓降（標準）:1.7V @ 40mA 穩(wěn)壓器數(shù)量:1 電流 - 輸出:100mA（最小值） 電流 - 限制（最?。?- 工作溫度:0°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOIC 包裝:剪切帶 (CT) 產(chǎn)品目錄頁面:1075 (CN2011-ZH PDF) 其它名稱:296-24390-1 |
| LT3024EDE#TR | 功能描述:IC REG LDO ADJ .5A/.1A 12DFN RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 線性 系列:- 標準包裝:800 系列:- 穩(wěn)壓器拓撲結(jié)構(gòu):正，固定式 輸出電壓:2.5V 輸入電壓:最高 16V 電壓 - 壓降（標準）:0.7V @ 4A 穩(wěn)壓器數(shù)量:1 電流 - 輸出:4A 電流 - 限制（最小）:4.2A 工作溫度:0°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:TO-263-6，D²Pak（5 引線+接片），TO-263BA 供應(yīng)商設(shè)備封裝:TO-263-5 包裝:帶卷 (TR) 其它名稱:AP1184K525L-13AP1184K525LDITR |
| LT3024EDE#TRPBF | 功能描述:IC REG LDO ADJ .5A/.1A 12-DFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 線性 系列:- 標準包裝:800 系列:- 穩(wěn)壓器拓撲結(jié)構(gòu):正，固定式 輸出電壓:2.5V 輸入電壓:最高 16V 電壓 - 壓降（標準）:0.7V @ 4A 穩(wěn)壓器數(shù)量:1 電流 - 輸出:4A 電流 - 限制（最小）:4.2A 工作溫度:0°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:TO-263-6，D²Pak（5 引線+接片），TO-263BA 供應(yīng)商設(shè)備封裝:TO-263-5 包裝:帶卷 (TR) 其它名稱:AP1184K525L-13AP1184K525LDITR |
| LT3024EDEPBF | 制造商:Linear Technology 功能描述:LDO Regulator Dual Adj. 100/500mA DFN12 |
| LT3024EDE-PBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:Dual 100mA/500mA Low Dropout, Low Noise,Micropower Regulator |
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