參數(shù)資料
型號(hào)： LT3694IFE-1#TRPBF
廠商： Linear Technology
文件頁(yè)數(shù)： 10/28頁(yè)
文件大小： 338K
描述： IC REG TRPL BUCK/LINEAR 20TSSOP
標(biāo)準(zhǔn)包裝： 2,500
拓?fù)洌?/td> 降壓（降壓）（1），線性（LDO）（2）
功能： 任何功能
輸出數(shù)： 3
頻率 - 開關(guān)： 250kHz ~ 2.5MHz
電壓/電流 - 輸出 1： 0.75 V ~ 16 V，2.6A
電壓/電流 - 輸出 2： 控制器
電壓/電流 - 輸出 3： 控制器
帶 LED 驅(qū)動(dòng)器： 無(wú)
帶監(jiān)控器： 無(wú)
帶序列發(fā)生器： 是
電源電壓： 4 V ~ 36 V
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 20-TSSOP（0.173"，4.40mm 寬）裸露焊盤
供應(yīng)商設(shè)備封裝： 20-TSSOP-EP
包裝： 帶卷 (TR)
LT3694/LT3694-1
10
36941fb
STEP DOWN SWITCHING REGULATOR
Feedback Resistor Network
The output voltage is programmed with a resistor divider
(refer to the Block Diagram in Figure 1) between the output
and the FB pin. Choose the resistors according to:
 
R1=R2
V
OUT
750mV
1
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
The parallel combination of R1 and R2 should be 10k or
less to avoid bias current errors.
Input Overvoltage Lockout
An important feature of the LT3694 is the ability to survive
transient surges on the input voltage of up to 70V. This is
accomplished by shutting off the regulators to keep this
high voltage off the critical components. The overvoltage
lockout trips when the input voltage exceeds 38V.
Input Voltage Range
The minimum operating voltage is determined either by the
LT3694s internal undervoltage lockout or by its maximum
duty cycle. The duty cycle is the fraction of time that the
internal switch is on and is determined by the input and
output voltage:
 
DC=
V
OUT
+V
F
V
IN
V
SW
+V
F
where V
F
 is the forward voltage drop of the catch diode
and V
SW
 is the voltage drop of the internal switch (~0.3V
at maximum load). This leads to a minimum input
voltage of:
 
V
IN(MINCF)
=
V
OUT
+V
F
DC
MAX(CF)
V
F
+V
SW
The duty cycle is the fraction of time that the internal
switch is on during a clock cycle. The maximum duty cycle
for constant-frequency operation given by DC
MAX(CF)
 = 1
 t
OFF(MIN)
 " f
SW
. However, unlike most fixed frequency
regulators, the LT3694 will not switch off at the end of
each clock cycle if there is sufficient voltage across the
boost capacitor (C3 in Figure 1) to fully saturate the output
switch. A forced switch off for a minimum time will only
occur at the end of a clock cycle when the boost capaci-
tor needs to be recharged. This operation has the same
effect as lowering the clock frequency for a fixed off time,
resulting in a higher duty cycle and lower minimum input
voltage. The resultant duty cycle depends on the charging
times of the boost capacitor and can be approximated by
the following equation:
 
DC
MAX
=
B
+1
where B is the output current divided by the typical
boost current from the BST Pin Current vs Switch Cur-
rent curve in the Typical Performance Characteristics
section.
The maximum voltage, V
IN
, for constant-frequency opera-
tion is determined by the minimum duty cycle DC
MIN
:
 
V
IN(MAXCF)
=
V
OUT
+V
F
DC
MIN
V
F
+V
SW
with DC
MIN
 = t
ON(MIN)
 " f
SW
Thus, both the maximum and minimum input voltages
for constant-frequency operation are a function of the
switching frequency and output voltage. Therefore, the
maximum switching frequency must be set to a value that
accommodates the input and output voltage parameters
and must meet both of the following criteria:
 
f
MAX1
=
V
OUT
+V
F
V
IN(MAXCF)
V
SW
+V
F
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
1
t
ON(MIN)
f
MAX2
= 1
V
OUT
+V
F
V
IN(MINCF)
V
SW
+V
F
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
1
t
OFF(MIN)
The values of t
ON(MIN)
 and t
OFF(MIN)
 are functions of
I
SW
 and temperature (see chart in the Typical Perform-
ance Characteristics section). Worst-case values for
switch currents greater than 0.5A are t
ON(MIN)
 = 130ns and
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