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參數(shù)資料
| 型號： | LT6402IUD-12#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 16/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DIFF AMP/ADC DRVR 16-QFN |
| 標準包裝： | 121 |
| 放大器類型： | 差分 |
| 電路數(shù)： | 2 |
| 輸出類型： | 差分 |
| 轉換速率： | 400 V/µs |
| -3db帶寬： | 300MHz |
| 電流 - 輸入偏壓： | 5µA |
| 電壓 - 輸入偏移： | 1000µV |
| 電流 - 電源： | 30mA |
| 電流 - 輸出 / 通道： | 35mA |
| 電壓 - 電源，單路/雙路(±)： | 4 V ~ 5.5 V，±2 V ~ 2.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-WFQFN 裸露焊盤 |
| 供應商設備封裝： | 16-QFN-EP（3x3） |
| 包裝： | 管件 |
| 產品目錄頁面： | 1322 (CN2011-ZH PDF) |
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LT6402-12
VOCM (Pin 2): This pin sets the output common mode
voltage. Without additional biasing, both inputs bias to
this voltage as well. This input is high impedance.
VCCA, VCCB, VCCC (Pins 3, 10, 1): Positive Power Supply
(Normally Tied to 5V). All three pins must be tied to the
same voltage. Bypass each pin with 1000pF and 0.1μF
capacitors as close to the package as possible. Split
supplies are possible as long as the voltage between VCC
and VEE is 5V.
VEEA, VEEB, VEEC (Pins 4, 9, 12): Negative Power Supply
(Normally Tied to Ground). All three pins must be tied to
the same voltage. Split supplies are possible as long as
the voltage between VCC and VEE is 5V. If these pins are
not tied to ground, bypass each pin with 1000pF and 0.1μF
capacitors as close to the package as possible.
+OUT, –OUT (Pins 5, 8): Outputs (Unltered). These pins
are high bandwidth, low-impedance outputs. The DC
output voltage at these pins is set to the voltage applied
at VOCM.
+OUTFILTERED, –OUTFILTERED (Pins 6, 7): Filtered
Outputs. These pins add a series 50Ω resistor from the
unltered outputs and three 14pF capacitors. Each output
has 14pF to VEE, plus an additional 14pF between each pin
(See the Block Diagram). This lter has a –3dB bandwidth
of 75MHz.
ENABLE (Pin 11): This pin is a TTL logic input referenced
to the VEEC pin. If low, the LT6402-12 is enabled and draws
typically 30mA of supply current. If high, the LT6402-12
is disabled and draws typically 250μA.
+INA, +INB (Pins 15, 16): Positive Inputs. These pins are
normally tied together. These inputs may be DC- or AC-
coupled. If the inputs are AC-coupled, they will self-bias
to the voltage applied to the VOCM pin.
–INA, –INB (Pins 14, 13): Negative Inputs. These pins are
normally tied together. These inputs may be DC- or AC-
coupled. If the inputs are AC-coupled, they will self-bias
to the voltage applied to the VOCM pin.
Exposed Pad (Pin 17): Tie the pad to VEEC (Pin 12). If split
supplies are used, DO NOT tie the pad to ground.
PIN FUNCTIONS
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LT6402IUD-12-TR | 制造商:LINER 制造商全稱:Linear Technology 功能描述:300MHz Low Distortion, Low Noise Differential Amplifi er/ ADC Driver (AV = 12dB) |
| LT6402IUD-12-TRPBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:300MHz Low Distortion, Low Noise Differential Amplifi er/ ADC Driver (AV = 12dB) |
| LT6402IUD-20 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:300MHz Low Distortion, Low Noise Differential Amplifier/ ADC Driver (AV = 20dB) |
| LT6402IUD-20#PBF | 功能描述:IC DIFF AMP/ADC DRVR 16-QFN RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標準包裝:2,500 系列:- 放大器類型:通用 電路數(shù):2 輸出類型:滿擺幅 轉換速率:350 V/µs 增益帶寬積:180MHz -3db帶寬:320MHz 電流 - 輸入偏壓:12.5µA 電壓 - 輸入偏移:800µV 電流 - 電源:15mA 電流 - 輸出 / 通道:85mA 電壓 - 電源，單路/雙路(±):2.5 V ~ 12.6 V，±1.25 V ~ 6.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應商設備封裝:8-MSOP 包裝:帶卷 (TR) |
| LT6402IUD-20#TR | 制造商:Linear Technology 功能描述:DIFF-AMPLIFIER, 300MHZ, 400V/US, QFN-16, No. of Amplifiers:1, Input Offset Voltage:1mV, Gain dB Max:20dB, Bandwidth:300MHz, Amplifier Case Style:QFN, No. of Pins:16, Supply Voltage Range:4V to 5.5V, Slew Rate:400V/s, MSL:- |
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