參數(shù)資料
型號: LT6402IUD-12#PBF
廠商: Linear Technology
文件頁數(shù): 4/16頁
文件大?。?/td> 0K
描述: IC DIFF AMP/ADC DRVR 16-QFN
標準包裝: 121
放大器類型: 差分
電路數(shù): 2
輸出類型: 差分
轉換速率: 400 V/µs
-3db帶寬: 300MHz
電流 - 輸入偏壓: 5µA
電壓 - 輸入偏移: 1000µV
電流 - 電源: 30mA
電流 - 輸出 / 通道: 35mA
電壓 - 電源,單路/雙路(±): 4 V ~ 5.5 V,±2 V ~ 2.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-WFQFN 裸露焊盤
供應商設備封裝: 16-QFN-EP(3x3)
包裝: 管件
產(chǎn)品目錄頁面: 1322 (CN2011-ZH PDF)
LT6402-12
12
640212fa
Figure 5. LT6402-12 Internal Filter Topology –3dB BW ≈75MHz
Figure 6. LT6402-12 Internal Filter Topology Modied
for 2x Filter Bandwidth (2 External Resistors)
prior to the ADC to limit input noise at the ADC, thereby
improving system signal to noise ratio. Both the unltered
and ltered outputs of the LT6402-12 can easily drive the
high impedance inputs of these differential ADCs. If the
ltered outputs are used, then cutoff frequency and the
type of lter can be tailored for the specic application if
needed.
Wideband Applications
(Using the +OUT and –OUT Pins)
In applications where the full bandwidth of the LT6402-12
is desired, the unltered output pins (+OUT and –OUT)
should be used. They have a low output impedance;
therefore, gain is unaffected by output load. Capacitance
in excess of 5pF placed directly on the unltered outputs
results in additional peaking and reduced performance.
When driving an ADC directly, a small series resistance
is recommended between the LT6402-12’s outputs and
the ADC inputs (Figure 4). This resistance helps eliminate
any resonances associated with bond wire inductances of
either the ADC inputs or the LT6402-12’s outputs. A value
between 10Ω and 25Ω gives excellent results.
between the two ltered outputs. This resistor/capaci-
tor combination creates ltered outputs that look like a
series 50Ω resistor with a 42pF capacitor shunting each
ltered output to AC ground, giving a –3dB bandwidth of
75MHz.
The lter cutoff frequency is easily modied with just a
few external components. To increase the cutoff frequency,
simply add 2 equal value resistors, one between +OUT and
+OUTFILTERED and the other between –OUT and –OUTFIL-
TERED (Figure 6). These resistors are in parallel with the
internal 50Ω resistor, lowering the overall resistance and
increasing lter bandwidth. To double the lter bandwidth,
for example, add two external 50Ω resistors to lower the
series resistance to 25Ω. The 42pF of capacitance remains
unchanged, so lter bandwidth doubles.
To decrease lter bandwidth, add two external capacitors,
one from +OUTFILTERED to ground, and the other from
–OUTFILTERED to ground. A single differential capacitor
connected between +OUTFILTERED and –OUTFILTERED
Figure 4. Adding Small Series R at LT6402-12 Output
Filtered Applications
(Using the +OUTFILTERED and –OUTFILTERED Pins)
Filtering at the output of the LT6402-12 is often desired
to provide either anti-aliasing or improved signal to noise
ratio. To simplify this ltering, the LT6402-12 includes an
additional pair of differential outputs (+OUTFILTERED and
–OUTFILTERED) which incorporate an internal lowpass
lter network with a –3dB bandwidth of 75MHz (Figure 5).
These pins each have an output impedance of 50Ω. Inter-
nal capacitances are 14pF to VEE on each ltered output,
plus an additional 14pF capacitor connected differentially
APPLICATIONS INFORMATION
640212 F04
LT6402-12
–OUT
+OUT
8
5
10Ω TO 25Ω
ADC
640212 F05
50Ω
VEE
14pF
LT6402-12
–OUT
+OUT
50Ω
14pF
–OUTFILTERED
+OUTFILTERED
8
7
6
5
FILTERED OUTPUT
(75MHz)
VEE
640212 F06
50Ω
14pF
LT6402-12
–OUT
+OUT
50Ω
14pF
–OUTFILTERED
FILTERED OUTPUT
(150MHz)
+OUTFILTERED
8
7
6
5
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