VDD (Pin 1): Generated Positive Supply Voltage for RS232. Connect a 1 " />
參數(shù)資料
型號: LTC1343IGW
廠商: Linear Technology
文件頁數(shù): 24/28頁
文件大?。?/td> 0K
描述: IC TXRX SOFTWARE-SELECTBL 44SSOP
標準包裝: 27
類型: 收發(fā)器
驅(qū)動器/接收器數(shù): 4/4
規(guī)程: 多協(xié)議
電源電壓: 4.75 V ~ 5.25 V
安裝類型: 表面貼裝
封裝/外殼: 44-BSOP(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 44-SSOP
包裝: 管件
5
LTC1343
VDD (Pin 1): Generated Positive Supply Voltage for
RS232. Connect a 1
F capacitor to ground.
C1+ (Pin 2): Capacitor C1 Positive Terminal. Connect a
1
F capacitor between C1+ and C1.
PWRVCC (Pin 3): Positive Supply for the Charge Pump.
4.75V
≤ PWRVCC ≤ 5.25V. Tie to VCC (Pin 8) and bypass
with a 1
F capacitor to ground.
PIN FUNCTIONS
UU
U
C1(Pin 4): Capacitor C1 Negative Terminal.
D1 (Pin 5): TTL Level Driver 1 Input.
D2 (Pin 6): TTL Level Driver 2 Input.
D3 (Pin 7): TTL Level Driver 3 Input. Becomes a CMOS
level output when the chip is in the echoed clock mode
(EC = 0V).
Note 1: Absolute Maximum Ratings are those beyond which the safety of a
device may be impaired.
Note 2: All currents into device pins are positive; all currents out of device
are negative. All voltages are referenced to device ground unless otherwise
specified.
Note 3: All typicals are given for VCC = 5V, C1 = C2 = CVCC = CVDD = 1F,
CVEE = 3.3F tantalum capacitors and TA = 25°C.
ELECTRICAL CHARACTERISTICS The q denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V (Notes 2, 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V.10 Receiver
VTH
Receiver Input Threshold Voltage
0
°C ≤ TA ≤ 70°C
q
– 0.2
0.2
V
–7V
≤ VCM ≤ 7V, –40°C ≤ TA ≤ 85°C
q
– 0.3
0.3
V
VTH
Receiver Input Hysteresis
q
11
50
mV
IIN
Receiver Input Current
– 10V
≤ VA ≤ 10V
q
±0.50
mA
RIN
Receiver Input Impedance
– 10V
≤ VA ≤ 10V
q
20
30
k
tr, tf
Rise or Fall Time
(Figures 5, 9)
15
ns
tPLH
Input to Output
(Figures 5, 9)
350
ns
tPHL
Input to Output
(Figures 5, 9)
350
ns
V.28 Driver
VO
Output Voltage
Open Circuit
±10
V
RL = 3k (Figure 4)
q
±5
7.6
V
ISS
Short-Circuit Current
VO = GND
q
±150
mA
IOZ
Output Leakage Current
– 0.25V
≤ VO ≤ 0.25V, Power Off or
q
±0.01
±100
A
No-Cable Mode or Driver Disabled
SR
Slew Rate
(Figures 4, 8), RL = 3k, CL = 2500pF
q
4.0
30.0
V/
s
tPLH
Input to Output
(Figures 4, 8), RL = 3k, CL = 2500pF
q
1.6
2.5
s
tPHL
Input to Output
(Figures 4, 8), RL = 3k, CL = 2500pF
q
1.6
2.5
s
V.28 Receiver
VTHL
Input Low Threshold Voltage
q
1.4
0.8
V
VTLH
Input High Threshold Voltage
q
2.0
1.4
V
VTH
Receiver Input Hysteresis
q
0.1
0.4
1.0
V
RIN
Receiver Input Impedance
– 15V
≤ VA ≤ 15V
q
357
k
tr, tf
Rise or Fall Time
(Figures 5, 9)
15
ns
tPLH
Input to Output
(Figures 5, 9), CTRL = 0V
110
ns
CTRL = VCC
q
330
800
ns
tPHL
Input to Output
(Figures 5, 9), CTRL = 0V
170
ns
CTRL = VCC
q
480
800
ns
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