參數(shù)資料
型號: LTC1407
廠商: Linear Technology Corporation
英文描述: Serial 12-Bit/14-Bit, 3Msps Simultaneous Sampling Simultaneous Sampling
中文描述: 串行12-Bit/14-Bit,3Msps同步采樣同步采樣
文件頁數(shù): 17/24頁
文件大?。?/td> 443K
代理商: LTC1407
17
LTC1407/LTC1407A
1407f
APPLICATIOU
HARDWARE INTERFACE TO TMS320C54x
The LTC1407/LTC1407A are serial output ADCs whose
interface has been designed for high speed buffered serial
ports in fast digital signal processors (DSPs). Figure 6
shows an example of this interface using a TMS320C54X.
The buffered serial port in the TMS320C54x has direct
access to a 2kB segment of memory. The ADC’s serial data
can be collected in two alternating 1kB segments, in real
time, at the full 3Msps conversion rate of the LTC1407/
LTC1407A. The DSP assembly code sets frame sync mode
at the BFSR pin to accept an external positive going pulse
W
U
U
1407 F06
7
10
9
8
6
3-WIRE SERIAL
INTERFACELINK
V
DD
CONV
SCK
LTC1407/
LTC1407A
SDO
V
CC
BFSR
BCLKR
TMS320C54x
BDR
GND
CONV
CLK
0V TO 3V LOGIC SWING
5V
3V
B13
B12
Figure 6. DSP Serial Interface to TMS320C54x
and the serial clock at the BCLKR pin to accept an external
positive edge clock. Buffers near the LTC1407/LTC1407A
may be added to drive long tracks to the DSP to prevent
corruption of the signal to LTC1407/LTC1407A. This con-
figuration is adequate to traverse a typical system board,
but source resistors at the buffer outputs and termination
resistors at the DSP, may be needed to match the charac-
teristic impedance of very long transmission lines. If you
need to terminate the SDO transmission line, buffer it first
with one or two 74ACxx gates. The TTL threshold inputs of
the DSP port respond properly to the 3V swing used with
the LTC1407/LTC1407A.
相關(guān)PDF資料
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