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參數資料
| 型號： | LTC1955EUH#TR |
| 廠商： | Linear Technology |
| 文件頁數： | 2/22頁 |
| 文件大小： | 0K |
| 描述： | IC SMART CARD INTERFC DUAL 32QFN |
| 標準包裝： | 2,500 |
| 控制器類型： | 智能卡接口 |
| 接口： | 4 線串行 |
| 電源電壓： | 1.7 V ~ 5.5 V |
| 電流 - 電源： | 10µA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-WFQFN 裸露焊盤 |
| 供應商設備封裝： | 32-QFN 裸露焊盤（5x5） |
| 包裝： | 帶卷 (TR) |
LTC1955
10
1955fd
For more information www.linear.com/LTC1955
To receive status data from the serial port, a read/write op-
eration must be performed. When polling for the presence
of a smart card on both channels, the input word should
be set to $0000 since this is the shutdown command for
the LTC1955. However, consider the example where some
operation is already being performed on channel A. If, for
example, the previous command was $BE00 (VCCA set to
3V, card selected, I/O A connected to DATA and CLK A set
to ASYNC÷2), then the commands for this channel must
be rewritten to the serial port each time. To poll for the
presence of a card on channel B, or even the VCCA ready
status, then $BE00 should be rewritten on each new read/
write cycle. Once a card is detected on channel B, the
commands for channel B can be changed but the $BExx
should continue to be rewritten for channel A.
Bidirectional Channels
Thebidirectionalchannelsarelevelshiftedtotheappropri-
ate VCCA/B voltages at the I/O A/I/O B pins.
An NMOS pass transistor performs the level shifting. The
gateoftheNMOStransistorisbiasedsuchthatthetransis-
tor is completely off when both sides have relinquished
the channel. If one side of the channel asserts an L, then
the transistor will convey the L to the other side. Note that
currentpassesfromthereceivingsideofthechanneltothe
transmitting side. The low output voltage of the receiving
side will be dependent upon the voltage at the transmitting
side plus the I R drop of the pass transistor.
When a card socket is selected, it becomes a candidate
to drive data on the DATA pin, and likewise, receive data
from the DATA pin. When a card socket is deselected, the
voltage on its I/O A/I/O B pin will return to the idle state
(H), and the DATA side of that channel will become high
impedance. If both cards are deselected, the DATA pin
will be high impedance.
Both cards may be deselected at the same time to allow
communication with a second LTC1955.
Card channel A includes provision for unidirectional
communication with the C4 and C8 pins of the smart
card. The C4, C8 and I/O pins of card A are individually
multiplexed to the DATA pin using bits D11 and D12, as
shown in Table 4.
operaTion
Table 1. Serial Port Comand
STATUS OUTPUT
BIT
COMMAND INPUT
CARD B 0
D0 VCCB Options
(See Table 2)
0
D1
0
D2 Card B Select/Deselect
0
D3 Data Pull-Up Defeat
Card B Electrical Fault
D4 Reserved (Always Set to “0”)
Card B ATR Fault
D5 Card B Clock Options
(See Table 3)
Card B VCC Ready
D6
Card B Present
D7
CARD A 0
D8 VCCA Options
(See Table 2)
0
D9
0
D10 Card A Select/Deselect
0
D11 Card A Communications
Options (See Table 4)
Card A Electrical Fault
D12
Card A ATR Fault
D13 Card A Clock Options
(See Table 3)
Card A VCC Ready
D14
Card A Present
D15
Table 2. VCC and Shutdown Options
D9
D1
D8
D0
STATUS (CARD A)
STATUS (CARD B)
0
VCC = 0V (Shutdown)
0
1
VCC = 1.8V
1
0
VCC = 3V
1
VCC = 5V
Table 3. Clock Options
D7
D15
D6
D14
D5
D13
CLOCK MODE (CARD B)
CLOCK MODE (CARD A)
0
Synchronous Mode
0
1
Unused
0
1
0
Asynchronous Stop Low
0
1
Asynchronous Stop High
1
0
Asynchronous ÷1
1
0
1
Asynchronous ÷2
1
0
Asynchronous ÷4
1
Asynchronous ÷8
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