參數(shù)資料
型號(hào): LTC2205CUK-14#TRPBF
廠商: Linear Technology
文件頁數(shù): 11/28頁
文件大?。?/td> 0K
描述: IC ADC 14-BIT 65MSPS 48-QFN
標(biāo)準(zhǔn)包裝: 2,000
位數(shù): 14
采樣率(每秒): 65M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 776mW
電壓電源: 單電源
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 48-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 48-QFN-EP(7x7)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 1 個(gè)差分
配用: DC890B-ND - BOARD USB DATA COLLECTION
LTC2205-14
19
220514fb
Figure 8. Transformer Driven Encode
Any noise present on the encode signal will result in
additional aperture jitter that will be RMS summed with
the inherent ADC aperture jitter.
In applications where jitter is critical (high input
frequencies), take the following into consideration:
1. Differential drive should be used.
2. Use as large an amplitude possible. If using transformer
coupling, use a higher turns ratio to increase the
amplitude.
3. If the ADC is clocked with a xed frequency sinusoidal
signal, lter the encode signal to reduce wideband
noise.
4. Balance the capacitance and series resistance at both
encode inputs such that any coupled noise will appear
at both inputs as common mode noise.
The encode inputs have a common mode range of 1.2V
to 3V. Each input may be driven from ground to VDD for
single-ended drive.
APPLICATIONS INFORMATION
VDD
LTC2205-14
220514 F08
VDD
1.6V
6k
TO INTERNAL
ADC CLOCK
DRIVERS
ENC–
ENC+
ETC1-1T
0.1μF
33pF
ENCODE
INPUT
100Ω
50Ω
0.1μF
50Ω
PGA Pin
The PGA pin selects between two gain settings for the ADC
front-end. PGA = 0 selects an input range of 2.25VP-P;
PGA = 1 selects an input range of 1.5VP-P. The 2.25V
input range has the best SNR; however, the distortion
will be higher for input frequencies above 100MHz. For
applications with high input frequencies, the low input
range will have improved distortion; however, the SNR
will be worse by up to approximately 2dB. See the Typical
Performance Characteristics section.
Driving the Encode Inputs
The noise performance of the LTC2205-14 can depend on
the encode signal quality as much as on the analog input.
The encode inputs are intended to be driven differentially,
primarily for noise immunity from common mode noise
sources. Each input is biased through a 6k resistor to a
1.6V bias. The bias resistors set the DC operating point
for transformer coupled drive circuits and can set the logic
threshold for single-ended drive circuits.
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