AIN +
參數(shù)資料
型號: LTC2207IUK-14#TRPBF
廠商: Linear Technology
文件頁數(shù): 13/32頁
文件大?。?/td> 0K
描述: IC ADC 14BIT 105MSPS 48-QFN
標準包裝: 2,000
位數(shù): 14
采樣率(每秒): 105M
數(shù)據(jù)接口: 并聯(lián)
轉換器數(shù)目: 1
功率耗散(最大): 1.07W
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-WFQFN 裸露焊盤
供應商設備封裝: 48-QFN-EP(7x7)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 1 個差分
配用: DC890B-ND - BOARD USB DATA COLLECTION
LTC2207-14/LTC2206-14
20
220714614fc
Figure 5. DC Coupled Input with Differential Amplier
+
AIN
+
AIN
2.2μF
12pF
VCM
LTC2207-14/
LTC2206-14
ANALOG
INPUT
2207614 F05
CM
AMPLIFIER = LTC6600-20,
LT1993, ETC.
HIGH SPEED
DIFFERENTIAL
AMPLIFIER
25Ω
PGA
1.25V
SENSE
VCM
BUFFER
INTERNAL
ADC
REFERENCE
RANGE
SELECT
AND GAIN
CONTROL
2.5V
BANDGAP
REFERENCE
2.2μF
TIE TO VDD TO USE
INTERNAL 2.5V
REFERENCE
OR INPUT FOR
EXTERNAL 2.5V
REFERENCE
OR INPUT FOR
EXTERNAL 1.25V
REFERENCE
2207614 F06
LTC2207-14/
LTC2206-14
Figure 6. Reference Circuit
Direct Coupled Circuits
Figure 5 demonstrates the use of a differential amplier to
convert a single ended input signal into a differential input
signal. The advantage of this method is that it provides
low frequency input response; however, the limited gain
bandwidth of any op amp or closed-loop amplier will de-
grade the ADC SFDR at high input frequencies. Additionally,
wideband op amps or differential ampliers tend to have
high noise. As a result, the SNR will be degraded unless
the noise bandwidth is limited prior to the ADC input.
Reference Operation
Figure 6 shows the LTC2207-14/LTC2206-14 refer-
ence circuitry consisting of a 2.5V bandgap reference,
a programmable gain amplier and control circuit. The
LTC2207-14/LTC2206-14 have three modes of reference
operation: Internal Reference, 1.25V external reference
or 2.5V external reference. To use the internal reference,
tie the SENSE pin to VDD. To use an external reference,
simply apply either a 1.25V or 2.5V reference voltage to the
SENSE input pin. Both 1.25V and 2.5V applied to SENSE
will result in a full scale range of 2.25VP-P (PGA = 0). A
1.25V output VCM is provided for a common mode bias
for input drive circuitry. An external bypass capacitor is
required for the VCM output. This provides a high frequency
low impedance path to ground for internal and external
circuitry. This is also the compensation capacitor for the
reference; it will not be stable without this capacitor. The
minimum value required for stability is 2.2μF.
The internal programmable gain amplier provides the
internal reference voltage for the ADC. This amplier has
very stringent settling requirements and is not accessible
for external use.
The SENSE pin can be driven ±5% around the nominal 2.5V
or 1.25V external reference inputs. This adjustment range
can be used to trim the ADC gain error or other system
gain errors. When selecting the internal reference, the
SENSE pin should be tied to VDD as close to the converter
as possible. If the sense pin is driven externally it should
be bypassed to ground as close to the device as possible
with 1μF (or larger) ceramic capacitor.
PGA Pin
The PGA pin selects between two gain settings for
the ADC front-end. PGA = 0 selects an input range of
2.25VP-P; PGA = 1 selects an input range of 1.5VP-P. The
2.25V input range has the best SNR; however, the distor-
tion will be higher for input frequencies above 100MHz.
For applications with high input frequencies, the low input
range will have improved distortion; however, the SNR
will be worse by up to approximately 2dB. See the Typical
Performance Characteristics section.
APPLICATIONS INFORMATION
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