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參數(shù)資料
| 型號： | LTC2207IUK-14#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 17/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 14BIT 105MSPS 48-QFN |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 105M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 1.07W |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 48-QFN-EP（7x7） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個差分 |
| 配用： | DC890B-ND - BOARD USB DATA COLLECTION |
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LTC2207-14/LTC2206-14
24
220714614fc
APPLICATIONS INFORMATION
converter data to the digital system. This is necessary
when using a sinusoidal encode. Data can be latched on the
rising edge of CLKOUT+ or the falling edge of CLKOUT–.
CLKOUT+ falls and CLKOUT– rises as the data outputs
are updated.
Digital Output Randomizer
Interference from the ADC digital outputs is sometimes
unavoidable. Interference from the digital outputs may be
from capacitive or inductive coupling or coupling through
the ground plane. Even a tiny coupling factor can result in
discernible unwanted tones in the ADC output spectrum.
By randomizing the digital output before it is transmitted
off chip, these unwanted tones can be randomized, trading
a slight increase in the noise oor for a large reduction in
unwanted tone amplitude.
The digital output is “Randomized” by applying an exclu-
sive-OR logic operation between the LSB and all other data
output bits. To decode, the reverse operation is applied;
that is, an exclusive-OR operation is applied between the
LSB and all other bits. The LSB, OF and CLKOUT outputs
are not affected. The output Randomizer function is active
when the RAND pin is high.
Output Driver Power
Separate output power and ground pins allow the output
drivers to be isolated from the analog circuitry. The power
supply for the digital output buffers, OVDD, should be tied
to the same power supply as for the logic being driven.
For example, if the converter is driving a DSP powered
by a 1.8V supply, then OVDD should be tied to that same
1.8V supply. In CMOS mode OVDD can be powered with
any logic voltage up to the VDD of the ADC. OGND can be
powered with any voltage from ground up to 1V and must
be less than OVDD. The logic outputs will swing between
OGND and OVDD.
Internal Dither
The LTC2207-14/LTC2206-14 are 14-bit ADCs with a very
linear transfer function; however, at low input levels even
slight imperfections in the transfer function will result in
unwanted tones. Small errors in the transfer function are
usually a result of ADC element mismatches. An optional
internal dither mode can be enabled to randomize the input
location on the ADC transfer curve, resulting in improved
SFDR for low signal levels.
Figure 13. Descrambling a Scrambled Digital Output
D1
D0
D2
D12
D13
LTC2207-14/
LTC2206-14
PC BOARD
FPGA
CLKOUT
OF
D13/D0
D12/D0
D2/D0
D1/D0
D0
2207614 F13
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC2207UK | 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 105Msps/80Msps ADCs |
| LTC2207UK-14 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:14-Bit, 105Msps/80Msps ADCs |
| LTC2208 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:Dual 14-Bit 250Msps |
| LTC2208-14 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:14-Bit, 130Msps ADC |
| LTC2208CUP | 制造商:Linear Technology 功能描述:IC ADC 16BIT 130MSPS 64-QFN |
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