參數(shù)資料
型號: LTC2223CUK
廠商: Linear Technology
文件頁數(shù): 10/28頁
文件大小: 0K
描述: IC ADC 12BIT 80MSPS SAMPLE 48QFN
標(biāo)準(zhǔn)包裝: 52
位數(shù): 12
采樣率(每秒): 80M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 406mW
電壓電源: 單電源
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 48-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 48-QFN-EP(7x7)
包裝: 管件
輸入數(shù)目和類型: 1 個(gè)單端,雙極; 1 個(gè)差分,雙極
LTC2222/LTC2223
18
22223fb
APPLICATIONS INFORMATION
Figure 4 demonstrates the use of a differential amplier to
convert a single ended input signal into a differential input
signal. The advantage of this method is that it provides
low frequency input response; however, the limited gain
bandwidth of most op amps will limit the SFDR at high
input frequencies.
Figure 5 shows a single-ended input circuit. The impedance
seen by the analog inputs should be matched. This circuit
is not recommended if low distortion is required.
The 25Ω resistors and 12pF capacitor on the analog inputs
serve two purposes: isolating the drive circuitry from
the sample-and-hold charging glitches and limiting the
wideband noise at the converter input. For input frequen-
cies higher than 100MHz, the capacitor may need to be
decreased to prevent excessive signal loss.
For input frequencies above 100MHz the input circuits of
Figure 6, 7 and 8 are recommended. The balun transformer
gives better high frequency response than a ux coupled
center tapped transformer. The coupling capacitors allow
the analog inputs to be DC biased at 1.6V. In Figure 8 the
series inductors are impedance matching elements that
maximize the ADC bandwidth.
Reference Operation
Figure 9 shows the LTC2222/LTC2223 reference circuitry
consisting of a 1.6V bandgap reference, a difference ampli-
er and switching and control circuit. The internal voltage
reference can be congured for two pin selectable input
ranges of 2V (±1V differential) or 1V (±0.5V differential).
Tying the SENSE pin to VDD selects the 2V range; typing
the SENSE pin to VCM selects the 1V range.
The 1.6V bandgap reference serves two functions: its
output provides a DC bias point for setting the common
mode voltage of any external input circuitry; additionally,
the reference is used with a difference amplier to gener-
ate the differential reference levels needed by the internal
ADC circuitry. An external bypass capacitor is required
for the 1.6V reference output, VCM. This provides a high
frequency low impedance path to ground for internal and
external circuitry.
The difference amplier generates the high and low
reference for the ADC. High speed switching circuits are
connected to these outputs and they must be externally
bypassed. Each output has four pins: two each of REFHA
and REFHB for the high reference and two each of REFLA
and REFLB for the low reference. The multiple output pins
are needed to reduce package inductance. Bypass capaci-
tors must be connected as shown in Figure 9.
Other voltage ranges in between the pin selectable ranges
can be programmed with two external resistors as shown
in Figure 10. An external reference can be used by ap-
plying its output directly or through a resistor divider to
SENSE. It is not recommended to drive the SENSE pin
with a logic device. The SENSE pin should be tied to the
appropriate level as close to the converter as possible. If
the SENSE pin is driven externally, it should be bypassed
to ground as close to the device as possible with a 1μF
ceramic capacitor.
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