參數(shù)資料
型號(hào): LTC2241CUP-10#TRPBF
廠商: Linear Technology
文件頁(yè)數(shù): 20/28頁(yè)
文件大?。?/td> 0K
描述: IC ADC 10BIT 210MSPS 64-QFN
標(biāo)準(zhǔn)包裝: 2,000
位數(shù): 10
采樣率(每秒): 210M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 805mW
電壓電源: 單電源
工作溫度: 0°C ~ 70°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 64-WFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 64-QFN(9x9)
包裝: 帶卷 (TR)
輸入數(shù)目和類(lèi)型: 1 個(gè)差分,雙極
LTC2241-10
27
224110fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PACKAGE DESCRIPTION
UP Package
64-Lead Plastic QFN (9mm × 9mm)
(Reference LTC DWG # 05-08-1705)
9 .00 ± 0.10
(4 SIDES)
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE
OUTLINE MO-220 VARIATION WNJR-5
2. ALL DIMENSIONS ARE IN MILLIMETERS
3. DIMENSIONS OF EXPOSED PAD ON BOTTOM
OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT,
SHALL NOT EXCEED 0.20mm ON ANY SIDE, IF PRESENT
4. EXPOSED PAD SHALL BE SOLDER PLATED
5. SHADED AREA IS ONLY A REFERENCE FOR PIN 1
LOCATION ON THE TOP AND BOTTOM OF PACKAGE
6. DRAWING NOT TO SCALE
PIN 1 TOP MARK
(SEE NOTE 5)
0.40 ± 0.10
64
63
1
2
BOTTOM VIEW—EXPOSED PAD
7.15 ± 0.10
(4-SIDES)
0.75 ± 0.05
R = 0.115
TYP
0.25 ± 0.05
0.50 BSC
0.200 REF
0.00 – 0.05
(UP64) QFN 1003
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.70 ±0.05
7.15 ±0.05
(4 SIDES)
8.10 ±0.05 9.50 ±0.05
0.25 ±0.05
0.50 BSC
PACKAGE OUTLINE
PIN 1
CHAMFER
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