參數(shù)資料
型號(hào)： LTC2242IUP-10#TRPBF
廠商： Linear Technology
文件頁(yè)數(shù)： 9/30頁(yè)
文件大小： 0K
描述： IC ADC 10BIT 250MSPS 64-QFN
標(biāo)準(zhǔn)包裝： 2,000
位數(shù)： 10
采樣率（每秒）： 250M
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 975mW
電壓電源： 單電源
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 64-QFN（9x9）
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 1 個(gè)差分，雙極
LTC2242-10
17
224210fd
applicaTions inForMaTion
the sample-and-hold charging glitches and limiting the
wideband noise at the converter input. For input frequen-
cies higher than 100MHz, the capacitor may need to be
decreased to prevent excessive signal loss.
The AIN+ and AIN– inputs each have two pins to reduce
package inductance. The two AIN+ and the two AIN– pins
should be shorted together.
For input frequencies above 100MHz the input circuits of
Figure6,7and8arerecommended.Thebaluntransformer
gives better high frequency response than a flux coupled
center tapped transformer. The coupling capacitors allow
the analog inputs to be DC biased at 1.25V. In Figure 8 the
series inductors are impedance matching elements that
maximize the ADC bandwidth.
Reference Operation
Figure9showstheLTC2242-10referencecircuitryconsist-
ing of a 1.25V bandgap reference, a difference amplifier
and switching and control circuit. The internal voltage
reference can be configured for two pin selectable input
ranges of 2V (±1V differential) or 1V (±0.5V differential).
Tying the SENSE pin to VDD selects the 2V range; typing
the SENSE pin to VCM selects the 1V range.
The 1.25V bandgap reference serves two functions: its
output provides a DC bias point for setting the common
mode voltage of any external input circuitry; additionally,
the reference is used with a difference amplifier to gener-
ate the differential reference levels needed by the internal
ADC circuitry. An external bypass capacitor is required
for the 1.25V reference output, VCM. This provides a high
frequency low impedance path to ground for internal and
external circuitry.
The difference amplifier generates the high and low
reference for the ADC. High speed switching circuits are
connected to these outputs and they must be externally
bypassed. Each output has four pins: two each of REFHA
and REFHB for the high reference and two each of REFLA
and REFLB for the low reference. The multiple output pins
are needed to reduce package inductance. Bypass capaci-
tors must be connected as shown in Figure 9.
Figure 6. Recommended Front End Circuit for
Input Frequencies Between 100MHz and 250MHz
Figure 7. Recommended Front End Circuit for
Input Frequencies Between 250MHz and 500MHz
Figure 8. Recommended Front End Circuit for
Input Frequencies Above 500MHz
25Ω
12Ω
10Ω
0.1μF
AIN+
AIN–
8pF
2.2μF
VCM
ANALOG
INPUT
0.1μF
T1
T1 = MA/COM ETC1-1-13
RESISTORS, CAPACITORS
ARE 0402 PACKAGE SIZE
224210 F06
LTC2242-10
25Ω
10Ω
25Ω
0.1μF
AIN+
AIN–
2.2μF
VCM
ANALOG
INPUT
0.1μF
T1
T1 = MA/COM ETC1-1-13
RESISTORS, CAPACITORS
ARE 0402 PACKAGE SIZE
224210 F07
LTC2242-10
25Ω
10Ω
25Ω
0.1μF
AIN+
AIN–
2.2μF
VCM
LTC2242-10
ANALOG
INPUT
0.1μF
T1
T1 = MA/COM ETC1-1-13
RESISTORS, CAPACITORS
ARE 0402 PACKAGE SIZE
224210 F08
2.7nH
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