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參數(shù)資料
| 型號： | LTC2263IUJ-12#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 13/34頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT SER/PAR 25M 40-QFN |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 25M |
| 數(shù)據(jù)接口： | Serial LVDS |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 146mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 40-QFN（6x6） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 2 Differential; 2 Single-Ended |
| 配用： | DC1532A-L-ND - BOARD DEMO 25MSPS LTC2263-12 DC1371A-ND - BOARD USB DATA ACQUISITION HS |
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20
22654312fb
LTC2265-12/
LTC2264-12/LTC2263-12
CONVERTER OPERATION
The LTC2265-12/LTC2264-12/LTC2263-12 are low power,
2-channel, 12-bit, 65Msps/40Msps/25Msps A/D convert-
ers that are powered by a single 1.8V supply. The analog
inputsshouldbedrivendifferentially.Theencodeinputcan
be driven differentially for optimal jitter performance, or
single-ended for lower power consumption. To minimize
thenumberofdatalines,thedigitaloutputsareserialLVDS.
Each channel outputs two bits at a time (2-lane mode) or
one bit at a time (1-lane mode). Many additional features
canbechosenbyprogrammingthemodecontrolregisters
through a serial SPI port.
ANALOG INPUT
The analog inputs are differential CMOS sample-and-hold
circuits(Figure2).Theinputsshouldbedrivendifferentially
around a common mode voltage set by the VCM1 or VCM2
output pins, which are nominally VDD/2. For the 2V input
range, the inputs should swing from VCM – 0.5V to VCM
+ 0.5V. There should be a 180° phase difference between
the inputs.
The two channels are simultaneously sampled by a
shared encode circuit (Figure 2).
INPUT DRIVE CIRCUITS
Input Filtering
If possible, there should be an RC lowpass filter right
at the analog inputs. This lowpass filter isolates the
drive circuitry from the A/D sample-and-hold switching
and limits wideband noise from the drive circuitry.
Figure 3 shows an example of an input RC filter. The
RC component values should be chosen based on the
application’s input frequency.
APPLICATIONS INFORMATION
Transformer Coupled Circuits
Figure 3 shows the analog input being driven by an RF
transformer with a center-tapped secondary. The center
tap is biased with VCM, setting the A/D input at its opti-
mal DC level. At higher input frequencies a transmission
line balun transformer (Figures 4 to 6) has better balance,
resulting in lower A/D distortion.
CSAMPLE
3.5pF
RON
25
RON
25
VDD
LTC2265-12
AIN+
226512 F02
CSAMPLE
3.5pF
VDD
AIN–
ENC–
ENC+
1.2V
10k
1.2V
10k
CPARASITIC
1.8pF
CPARASITIC
1.8pF
10
Figure 2. Equivalent Input Circuit. Only One of
the Two Analog Channels Is Shown.
25
50
0.1F
AIN+
AIN–
12pF
0.1F
VCM
LTC2265-12
ANALOG
INPUT
0.1F
T1
1:1
T1: MA/COM MABAES0060
RESISTORS, CAPACITORS
ARE 0402 PACKAGE SIZE
226512 F03
Figure 3. Analog Input Circuit Using a Transformer.
Recommended for Input Frequencies from 5MHz to 70MHz
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC2263IUJ-14 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:14-Bit, 65Msps/40Msps/25Msps Low Power Dual ADCs |
| LTC2263IUJ-14#PBF | 功能描述:IC ADC 14BIT SER/PAR 25M 40-QFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| LTC2263IUJ-14#TRPBF | 功能描述:IC ADC 14BIT SER/PAR 25M 40-QFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| LTC2263IUJ-14PBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:14-Bit, 65Msps/40Msps/25Msps Low Power Dual ADCs |
| LTC2263IUJ-14TRPBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:14-Bit, 65Msps/40Msps/25Msps Low Power Dual ADCs |
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