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參數(shù)資料
| 型號： | LTC2263IUJ-12#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 9/34頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT SER/PAR 25M 40-QFN |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 25M |
| 數(shù)據(jù)接口： | Serial LVDS |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 146mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 40-QFN（6x6） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 2 Differential; 2 Single-Ended |
| 配用： | DC1532A-L-ND - BOARD DEMO 25MSPS LTC2263-12 DC1371A-ND - BOARD USB DATA ACQUISITION HS |
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LTC2265-12/
LTC2264-12/LTC2263-12
17
22654312fb
PIN FUNCTIONS
AIN1+ (Pin 1): Channel 1 Positive Differential Analog
Input.
AIN1– (Pin 2): Channel 1 Negative Differential Analog
Input.
VCM1(Pin3):CommonModeBiasOutput,NominallyEqual
to VDD/2. VCM should be used to bias the common mode
of the analog inputs of channel 1. Bypass to ground with
a 0.1F ceramic capacitor.
REFH (Pins 4, 5): ADC High Reference. Bypass to pins 6, 7
with a 2.2F ceramic capacitor, and to ground with a 0.1F
ceramic capacitor.
REFL (Pins 6, 7): ADC Low Reference. Bypass to pins 4, 5
with a 2.2F ceramic capacitor, and to ground with a 0.1F
ceramic capacitor.
VCM2(Pin8):CommonModeBiasOutput,NominallyEqual
to VDD/2. VCM should be used to bias the common mode
of the analog inputs of channel 2. Bypass to ground with
a 0.1F ceramic capacitor.
AIN2+ (Pin 9): Channel 2 Positive Differential Analog
Input.
AIN2– (Pin 10): Channel 2 Negative Differential Analog
Input.
VDD (Pins 11, 12, 39, 40): Analog Power Supply, 1.7V
to 1.9V. Bypass to ground with 0.1F ceramic capacitors.
Adjacent pins can share a bypass capacitor.
ENC+ (Pin 13): Encode Input. Conversion starts on the
rising edge.
ENC– (Pin 14): Encode Complement Input. Conversion
starts on the falling edge.
CS(Pin15):Inserialprogrammingmode(PAR/SER=0V),
CS is the serial interface chip select input. When CS is low,
SCK is enabled for shifting data on SDI into the mode
controlregisters.Inparallelprogrammingmode(PAR/SER
= VDD), CS selects 2-lane or 1-lane output mode. CS can
be driven with 1.8V to 3.3V logic.
SCK (Pin 16): In serial programming mode (PAR/SER
= 0V), SCK is the serial interface clock input. In parallel
programming mode (PAR/SER = VDD),SCKselects3.5mA
or 1.75mA LVDS output currents. SCK can be driven with
1.8V to 3.3V logic.
SDI (Pin 17): In serial programming mode (PAR/SER =
0V), SDI is the serial interface data input. Data on SDI
is clocked into the mode control registers on the rising
edge of SCK. In parallel programming mode (PAR/SER =
VDD), SDI can be used to power down the part. SDI can
be driven with 1.8V to 3.3V logic.
GND (Pins 18, 33, 37, Exposed Pad Pin 41): ADC Power
Ground. The exposed pad must be soldered to the PCB
ground.
OGND (Pin 25): Output Driver Ground. Must be shorted
to the ground plane by a very low inductance path. Use
multiple vias close to the pin.
OVDD (Pin 26): Output Driver Supply, 1.7V to 1.9V. Bypass
to ground with a 0.1F ceramic capacitor.
SDO (Pin 34): In serial programming mode (PAR/SER
= 0V), SDO is the optional serial interface data output.
Data on SDO is read back from the mode control registers
and can be latched on the falling edge of SCK. SDO is an
open-drain NMOS output that requires an external 2k pull-
up resistor of 1.8V to 3.3V. If readback from the mode
control registers is not needed, the pull-up resistor is not
necessary and SDO can be left unconnected. In parallel
programmingmode(PAR/SER=VDD),SDOisaninputthat
enables internal 100 termination resistors on the digital
outputs. When used as an input, SDO can be driven with
1.8V to 3.3V logic through a 1k series resistor.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC2263IUJ-14 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:14-Bit, 65Msps/40Msps/25Msps Low Power Dual ADCs |
| LTC2263IUJ-14#PBF | 功能描述:IC ADC 14BIT SER/PAR 25M 40-QFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| LTC2263IUJ-14#TRPBF | 功能描述:IC ADC 14BIT SER/PAR 25M 40-QFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| LTC2263IUJ-14PBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:14-Bit, 65Msps/40Msps/25Msps Low Power Dual ADCs |
| LTC2263IUJ-14TRPBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:14-Bit, 65Msps/40Msps/25Msps Low Power Dual ADCs |
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