參數(shù)資料
型號(hào): LTC2263IUJ-12#TRPBF
廠商: Linear Technology
文件頁(yè)數(shù): 26/34頁(yè)
文件大?。?/td> 0K
描述: IC ADC 12BIT SER/PAR 25M 40-QFN
標(biāo)準(zhǔn)包裝: 2,000
位數(shù): 12
采樣率(每秒): 25M
數(shù)據(jù)接口: Serial LVDS
轉(zhuǎn)換器數(shù)目: 2
功率耗散(最大): 146mW
電壓電源: 模擬和數(shù)字
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 40-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 40-QFN(6x6)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 2 Differential; 2 Single-Ended
配用: DC1532A-L-ND - BOARD DEMO 25MSPS LTC2263-12
DC1371A-ND - BOARD USB DATA ACQUISITION HS
32
22654312fb
LTC2265-12/
LTC2264-12/LTC2263-12
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PACKAGE DESCRIPTION
UJ Package
40-Lead (6mm × 6mm) Plastic QFN
(Reference LTC DWG # 05-08-1728)
6.00
± 0.10
(4 SIDES)
NOTE:
1. DRAWING IS A JEDEC PACKAGE OUTLINE VARIATION OF (WJJD-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE, IF PRESENT
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
PIN 1 TOP MARK
(SEE NOTE 6)
PIN 1 NOTCH
R = 0.45 OR
0.35
× 45°
CHAMFER
0.40
± 0.10
40
39
1
2
BOTTOM VIEW—EXPOSED PAD
4.50 REF
(4-SIDES)
4.42
± 0.10
4.42
± 0.10
4.42
± 0.05
4.42
± 0.05
0.75
± 0.05
R = 0.115
TYP
0.25
± 0.05
0.50 BSC
0.200 REF
0.00 – 0.05
(UJ40) QFN REV 0406
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
0.70
± 0.05
4.50
± 0.05
(4 SIDES)
5.10
± 0.05
6.50
± 0.05
0.25
± 0.05
0.50 BSC
PACKAGE OUTLINE
R = 0.10
TYP
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