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參數(shù)資料
型號(hào): LTC2264IUJ-12#TRPBF
廠商: Linear Technology
文件頁數(shù): 33/34頁
文件大?。?/td> 0K
描述: IC ADC 12BIT SER/PAR 40M 40-QFN
標(biāo)準(zhǔn)包裝: 2,000
位數(shù): 12
采樣率(每秒): 40M
數(shù)據(jù)接口: Serial LVDS
轉(zhuǎn)換器數(shù)目: 2
功率耗散(最大): 169mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 40-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 40-QFN(6x6)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 2 Differential; 2 Single-Ended
配用: DC1371A-ND - BOARD USB DATA ACQUISITION HS
8
22654312fb
LTC2265-12/
LTC2264-12/LTC2263-12
TIMING DIAGRAMS
2-Lane Output Mode, 16-Bit Serialization
226512 TD01
tAP
N + 1
N
ANALOG
INPUT
ENC
DCO
FR
ENC+
DCO+
FR+
OUT#A+
SAMPLE N-6
SAMPLE N-5
OUT#A
OUT#B+
OUT#B
SAMPLE N-4
tFRAME
tDATA
tSER
tPD
D3
D1
DX*
0
D11
D9
D7
D5
D3
D1
0
D11
D9
D7
D2
D0
DY*
DX*
DY*
0
D10
D8
D6
D4
D2
D0
0
D10
D8
D6
tENCH
tENCL
tSER
*DX AND DY ARE EXTRA NON-DATA BITS FOR COMPLETE SOFTWARE COMPATIBILITY WITH THE 14-BIT
VERSIONS OF THESE A/Ds. DURING NORMAL NON-OVERRANGED OPERATION DX AND DY ARE SET TO
LOGIC 0. SEE THE DATA FORMAT SECTION FOR MORE DETAILS.
226512 TD02
tAP
N + 2
N + 1
N
ANALOG
INPUT
ENC
DCO
FR
ENC+
DCO+
FR+
OUT#A+
NOTE THAT IN THIS MODE, FR+/FRHAS TWO TIMES THE PERIOD OF ENC+/ENC
SAMPLE N-6
SAMPLE N-5
OUT#A
OUT#B+
OUT#B
SAMPLE N-3
SAMPLE N-4
tFRAME
tDATA
tSER
tPD
D5
D3
D1
DX* D11 D9
D7
D5
D3
D1
DX* D11 D9
D7
D5
D3
D1
DX* D11 D9
D7
D4
D2
D0
DY* D10 D8
D6
D4
D2
D0
DY* D10 D8
D6
D4
D2
D0
DY* D10 D8
D6
tENCH
tENCL
tSER
*DX AND DY ARE EXTRA NON-DATA BITS FOR COMPLETE SOFTWARE COMPATIBILITY WITH THE 14-BIT
VERSIONS OF THESE A/Ds. DURING NORMAL NON-OVERRANGED OPERATION DX AND DY ARE SET TO
LOGIC 0. SEE THE DATA FORMAT SECTION FOR MORE DETAILS.
2-Lane Output Mode, 14-Bit Serialization
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