參數資料
型號: LTC2489CDE#PBF
廠商: Linear Technology
文件頁數: 13/24頁
文件大?。?/td> 0K
描述: IC ADC 16BIT DELTA SIG 14-DFN
標準包裝: 91
位數: 16
采樣率(每秒): 7.5
數據接口: I²C,串行
轉換器數目: 1
功率耗散(最大): 480µW
電壓電源: 單電源
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 14-WFDFN 裸露焊盤
供應商設備封裝: 14-DFN-EP(4x3)
包裝: 管件
輸入數目和類型: 4 個單端,雙極;2 個差分,雙極
配用: DC1010A-B-ND - BOARD DELTA SIGMA ADC LTC2489
LTC2489
20
2489fa
Output Data Rate
When using its internal oscillator, the LTC2489 produces
up to 7.5 samples per second (sps) with a notch frequency
of 60Hz. The actual output data rate depends upon the length
of the sleep and data output cycles which are controlled
by the user and can be made insignificantly short. When
operating with an external conversion clock (fO connected
to an external oscillator), the LTC2489 output data rate
can be increased. The duration of the conversion cycle is
41036/fEOSC. If fEOSC = 307.2kHz, the converter behaves
as if the internal oscillator is used.
An increase in fEOSC over the nominal 307.2kHz will trans-
late into a proportional increase in the maximum output
data rate (up to a maximum of 100sps). The increase in
output rate leads to degradation in offset, full-scale error,
and effective resolution as well as a shift in frequency
rejection.
A change in fEOSC results in a proportional change in the
internal notch position. This leads to reduced differential
mode rejection of line frequencies. The common mode
rejection of line frequencies remains unchanged, thus fully
differential input signals with a high degree of symmetry
on both the IN+ and INpins will continue to reject line
frequency noise.
An increase in fEOSC also increases the effective dynamic
input and reference current. External RC networks will
continue to have zero differential input current, but the
time required for complete settling (580ns for fEOSC =
307.2kHz) is reduced, proportionally.
Once the external oscillator frequency is increased above
1MHz (a more than 3X increase in output rate) the effective-
ness of internal auto calibration circuits begins to degrade.
This results in larger offset errors, full-scale errors, and
decreased resolution, as shown in Figures 19 to 26.
APPLICATIONS INFORMATION
Easy Drive ADCs Simplify Measurement of High
Impedance Sensors
Delta-Sigma ADCs, with their high accuracy and high noise
immunity, are ideal for directly measuring many types
of sensors. Nevertheless, input sampling currents can
overwhelm high source impedances or low-bandwidth,
micropower signal conditioning circuits. The LTC2489
solves this problem by balancing the input currents, thus
simplifying or eliminating the need for signal conditioning
circuits.
A common application for a delta-sigma ADC is thermistor
measurement. Figure 27 shows two examples of thermistor
digitization benefiting from the Easy Drive technology.
The first circuit (applied to input channels CH0 and CH1)
uses balanced reference resistors in order to balance the
common mode input/reference voltage and balance the
differential input source resistance. If reference resistors
R1 and R4 are exactly equal, the input current is zero and
no errors result. If these resistors have a 1% tolerance,
the maximum error in measured resistance is 1.6
Ω due
to a shift in common mode voltage; far less than the 1%
error of the reference resistors themselves. No amplifier
is required, making this an ideal solution in micropower
applications.
Easy Drive also enables very low power, low bandwidth
amplifiers to drive the input to the LTC2489. As shown in
Figure 27, CH2 is driven by the LT1494. The LT1494 has
excellent DC specs for an amplifier with 1.5μA supply
current (the maximum offset voltage is 150μV and the
open loop gain is 100,000). Its 2kHz bandwidth makes
it unsuitable for driving conventional delta sigma ADCs.
Adding a 1k
Ω,0.1μFfiltersolvesthisproblembyproviding
a charge reservoir that supplies the LTC2489 instantaneous
current, while the 1k resistor isolates the capacitive load
from the LT1494.
Conventional delta sigma ADCs input sampling current
lead to DC errors as a result of incomplete settling in the
external RC network.
The Easy Drive technology cancels the differential input
current. By balancing the negative input (CH3) with a 1k
Ω,
0.1μF network errors due to the common mode input
current are cancelled.
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