- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10355 > LTC2489CDE#PBF (Linear Technology)IC ADC 16BIT DELTA SIG 14-DFN PDF資料下載
參數(shù)資料
| 型號(hào)： | LTC2489CDE#PBF |
| 廠商： | Linear Technology |
| 文件頁(yè)數(shù)： | 3/24頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 16BIT DELTA SIG 14-DFN |
| 標(biāo)準(zhǔn)包裝： | 91 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 7.5 |
| 數(shù)據(jù)接口： | I²C，串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 480µW |
| 電壓電源： | 單電源 |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-WFDFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 14-DFN-EP（4x3） |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 4 個(gè)單端，雙極；2 個(gè)差分，雙極 |
| 配用： | DC1010A-B-ND - BOARD DELTA SIGMA ADC LTC2489 |
第1頁(yè)第2頁(yè)當(dāng)前第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)
LTC2489
11
2489fa
The Start and Stop Conditions
A Start (S) condition is generated by transitioning SDA from
high to low while SCL is high. The bus is considered to be
busy after the Start condition. When the data transfer is
finished, a Stop (P) condition is generated by transitioning
SDA from low to high while SCL is high. The bus is free
after a Stop is generated. Start and Stop conditions are
always generated by the master.
When the bus is in use, it stays busy if a Repeated Start
(Sr) is generated instead of a Stop condition. The repeated
Start timing is functionally identical to the Start and is
used for writing and reading from the device before the
initiation of a new conversion.
Data Transferring
After the Start condition, the I2C bus is busy and data
transfer can begin between the master and the addressed
slave. Data is transferred over the bus in groups of nine
bits, one byte followed by one acknowledge (ACK) bit.
The master releases the SDA line during the ninth SCL
clock cycle. The slave device can issue an ACK by pulling
SDA low or issue a Not Acknowledge (NAK) by leaving
the SDA line high impedance (the external pull-up resistor
will hold the line high). Change of data only occurs while
the clock line (SCL) is low.
DATA FORMAT
After a Start condition, the master sends a 7-bit address
followed by a read/write (R/W) bit. The R/W bit is 1 for
a read request and 0 for a write request. If the 7-bit ad-
dress matches the hard wired, LTC2489’s address (one of
9 pin-selectable addresses) the device is selected. When
the device is addressed during the conversion state, it will
not acknowledge R/W requests and will issue a NAK by
leaving the SDA line high. If the conversion is complete,
the LTC2489 issues an ACK by pulling the SDA line low.
The LTC2489 has two registers. The output register (24
bits long) contains the last conversion result. The input
register (8 bits long) sets the input channel.
DATA OUTPUT FORMAT
The output register contains the last conversion result.
After each conversion is completed, the device automati-
cally enters the sleep state where the supply current is
reduced to 1μA. When the LTC2489 is addressed for a read
operation, it acknowledges (by pulling SDA low) and acts
as a transmitter. The master/receiver can read up to three
bytes from the LTC2489. After a complete read operation
(3 bytes), a new conversion is initiated. The device will
NAK subsequent read operations while a conversion is
being performed.
The data output stream is 24 bits long and is shifted out
on the falling edges of SCL (see Figure 3a). The first bit
is the conversion result sign bit (SIG) (see Tables 1 and
2). This bit is high if VIN ≥ 0 and low if VIN < 0 (where VIN
corresponds to the selected input signal IN+ – IN–). The
second bit is the most significant bit (MSB) of the result.
The first two bits (SIG and MSB) can be used to indicate
over and under range conditions (see Table 2). If both bits
are HIGH, the differential input voltage is equal to or above
+FS. If both bits are set low, the input voltage is below
–FS. The function of these bits is summarized in Table 2.
The 16 bits following the MSB bit are the conversion
SDA
SCL
SSr
P
S
tHD(SDA)
tHD(DAT)
tSU(STA)
tSU(STO)
tSU(DAT)
tLOW
tHD(SDA)
tSP
tBUF
tr
tf
tr
tf
tHIGH
2489 F02
Figure 2. Definition of Timing for Fast/Standard Mode Devices on the I2C Bus
APPLICATIONS INFORMATION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VI-J5T-MX | CONVERTER MOD DC/DC 6.5V 75W |
| MAX9717DEBL+T | IC AMP AUDIO PWR 1.4W STER 9UCSP |
| D38999/20WA98AN | CONN HSG RCPT 3POS WALL MT PINS |
| MAX9717CEBL+T | IC AMP AUDIO PWR 1.4W STER 9UCSP |
| MS27484E14A18SLC | CONN HSG PLUG 18POS STRGHT SCKT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC2489IDE | 制造商:Linear Technology 功能描述:ADC Single Delta-Sigma 7.5sps 16-bit Serial 14-Pin DFN EP |
| LTC2489IDE#PBF | 功能描述:IC ADC 16BIT DELTA SIG 14-DFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個(gè)單端，單極 產(chǎn)品目錄頁(yè)面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
| LTC2489IDE#TRPBF | 功能描述:IC ADC 16BIT DELTA SIG 14-DFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):16 采樣率（每秒）:15 數(shù)據(jù)接口:MICROWIRE?，串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:480µW 電壓電源:單電源 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:38-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:38-QFN（5x7） 包裝:帶卷 (TR) 輸入數(shù)目和類型:16 個(gè)單端，雙極；8 個(gè)差分，雙極 配用:DC1011A-C-ND - BOARD DELTA SIGMA ADC LTC2494 |
| LTC2492CDE | 制造商:Linear Technology 功能描述:ADC Single Delta-Sigma 7.5sps 24-bit Serial 14-Pin DFN EP |
| LTC2492CDE#PBF | 功能描述:IC ADC 24BIT DELTA SIG 14-DFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個(gè)單端，單極 產(chǎn)品目錄頁(yè)面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。