參數(shù)資料
型號(hào)： LTC4269IDKD-2#TR
廠商： LINEAR TECHNOLOGY CORP
元件分類： 穩(wěn)壓器
英文描述： SWITCHING CONTROLLER, 560 kHz SWITCHING FREQ-MAX, PDSO32
封裝： 7 X 4 MM, PLASTIC, M0-229, DFN-32
文件頁(yè)數(shù)： 15/34頁(yè)
文件大?。?/td> 383K
代理商： LTC4269IDKD-2#TR
LTC4269-2
42692fb
An increase of voltage at the SD_VSEC pin causes the
maximum duty cycle clamp to decrease. If SD_VSEC is
resistively divided down from power supply input volt-
age, a volt-second clamp is realized. To adjust the initial
maximum duty cycle clamp, the SS_MAXDC pin voltage
is programmed by a resistor divider from the 2.5V VREF
pin to GND. An increase of programmed voltage on
SS_MAXDC pin provides an increase of switch maximum
duty cycle clamp.
Soft-Start
The LTC4269-2 provides true PWM soft-start by using the
SS_MAXDC pin to control soft-start timing. The propor-
tionalrelationshipbetweenSS_MAXDCvoltageandswitch
maximum duty cycle clamp allows the SS_MAXDC pin
to slowly ramp output voltage by ramping the maximum
switch duty cycle clamp—until switch duty cycle clamp
seamlessly meets the natural duty cycle of the converter.
A soft-start event is triggered whenever VIN is too low,
SD_VSEC is too low (power supply UVLO), or a 107mV
overcurrent threshold at OC pin is exceeded. Whenever a
soft-start event is triggered, switching at SOUT and OUT
is stopped immediately.
The SS_MAXDC pin is discharged and only released for
charging when it has fallen below its reset threshold
of 0.45V and all faults have been removed. Increasing
voltage on the SS_MAXDC pin above 0.8V will increase
switch maximum duty cycle. A capacitor to GND on the
SS_MAXDCpinincombinationwitharesistordividerfrom
VREF, defines the soft-start timing.
Current Mode Topology (ISENSE Pin)
The LTC4269-2 current mode topology eases frequency
compensation requirements because the output induc-
tor does not contribute to phase delay in the regulator
loop. This current mode technique means that the error
amplifier (nonisolated applications) or the opto-coupler
(isolatedapplications)commandscurrent(ratherthanvolt-
age) to be delivered to the output. This makes frequency
compensation easier and provides faster loop response
to output load transients.
Aresistordividerfromtheapplication’soutputvoltagegen-
erates a voltage at the inverting FB input of the LTC4269-2
error amplifier (or to the input of an external opto-coupler)
and is compared to an accurate reference (1.23V for
LTC4269-2).Theerroramplifieroutput(COMP)definesthe
input threshold (ISENSE) of the current sense comparator.
COMP voltages between 0.8V (active threshold) and 2.5V
define a maximum ISENSE threshold from 0mV to 220mV.
By connecting ISENSE to a sense resistor in series with the
source of an external power MOSFET, the MOSFET peak
current trip point (turn off) can be controlled by COMP
levelandhencebytheoutputvoltage.Anincreaseinoutput
load current causing the output voltage to fall, will cause
COMP to rise, increasing ISENSE threshold, increasing the
current delivered to the output. For isolated applications,
the error amplifier COMP output can be disabled to allow
theopto-couplertotakecontrol.SettingFB=VREFdisables
the error amplifier COMP output, reducing pin current to
(COMP – 0.7)/40k.
Slope Compensation
Thecurrentmodearchitecturerequiresslopecompensation
to be added to the current sensing loop to prevent subhar-
monic oscillations which can occur for duty cycles above
50%. Unlike most current mode converters which have a
slope compensation ramp that is fixed internally, placing a
constraint on inductor value and operating frequency, the
LTC4269-2 has externally adjustable slope compensation.
Slope compensation can be programmed by inserting an
external resistor (RSLOPE)inserieswiththeISENSEpin.The
LTC4269-2 has a linear slope compensation ramp which
sources current out of the ISENSE pin of approximately 8A
at 0% duty cycle to 35A at 80% duty cycle.
Overcurrent Detection and Soft-Start (OC Pin)
An added feature to the LTC4269-2 is a precise 107mV
sense threshold at the OC pin used to detect overcurrent
conditions in the converter and set a soft-start latch. The
OC pin is connected directly to the source of the primary-
side MOSFET to monitor peak current in the MOSFET (Fig-
ure 13). The 107mV threshold is constant over the entire
duty cycle range of the converter because it is unaffected
by the slope compensation added to the ISENSE pin.
applicaTions inForMaTion
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