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參數(shù)資料
| 型號(hào)： | LTC4269IDKD-2#TR |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SWITCHING CONTROLLER, 560 kHz SWITCHING FREQ-MAX, PDSO32 |
| 封裝： | 7 X 4 MM, PLASTIC, M0-229, DFN-32 |
| 文件頁數(shù)： | 8/34頁 |
| 文件大?。?/td> | 383K |
| 代理商： | LTC4269IDKD-2#TR |
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LTC4269-2
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when the PSE presents an input voltage between 15.5V
to 20.5V and the LTC4269-2 presents a Class 4 load cur-
rent. The PSE then drops the input voltage into the mark
voltage range of 7V to 10V, signaling the 1st mark event.
The PD in the mark voltage range presents a load current
between 0.25mA to 4mA.
The PSE repeats this sequence, signaling the 2nd Clas-
sification and 2nd mark event occurrence. This alerts the
LTC4269-2 that a Type 2 PSE is present. The Type 2 PSE
then applies power to the PD and the LTC4269-2 charges
up the reservoir capacitor C1 with a controlled inrush
current. When C1 is fully charged, and the LTC4269-2
declares power good, the T2P pin presents an active low
signal, or low impedance output with respect to VPORTN.
The T2P output becomes inactive when the LTC4269-2
input voltage falls below the PoE undervoltage lockout
threshold.
SIGNATURE CORRUPT DURING MARK
As a member of the IEEE 802.3at working group, Linear
noted that it is possible for a Type 2 PD to receive a false
indication of a 2-event classification if a PSE port is pre-
charged to a voltage above the detection voltage range
before the first detection cycle. The IEEE working group
modified the standard to prevent this possibility by requir-
ing a Type 2 PD to corrupt the signature resistance during
the mark event, alerting the PSE not to apply power. The
LTC4269-2 conforms to this standard by internally cor-
rupting the signature resistance. This also discharges the
port before the PSE begins the next detection cycle.
PD STABILITY DURING CLASSIFICATION
Classificationpresentsachallengingstabilityproblemdue
to the wide range of possible classification load current.
The onset of the classification load current introduces a
voltage drop across the cable and increases the forward
voltage of the input diode bridge. This may cause the PD
to oscillate between detection and classification with the
onset and removal of the classification load current.
The LTC4269-2 prevents this oscillation by introducing a
voltagehysteresiswindowbetweenthedetectionandclas-
sification ranges. The hysteresis window accommodates
the voltage changes a PD encounters at the onset of the
classification load current, thus providing a trouble-free
transition between detection and classification modes.
TheLTC4269-2alsomaintainsapositiveI-Vslopethrough-
out the classification range up to the on voltage. In the
event a PSE overshoots beyond the classification voltage
range, the available load current aids in returning the PD
back into the classification voltage range. (The PD input
may otherwise be “trapped” by a reverse-biased diode
bridge and the voltage held by the 0.1F capacitor.)
INRUSH CURRENT
Once the PSE detects and optionally classifies the PD, the
PSEthenappliespowertothePD.WhentheLTC4269-2port
voltage rises above the on voltage threshold, LTC4269-2
connects VNEG to VPORTN through the internal power
MOSFET.
To control the power-on surge currents in the system, the
LTC4269-2 provides a fixed inrush current, allowing C1 to
ramp up to the line voltage in a controlled manner.
The LTC4269-2 keeps the PD inrush current below the
PSE current limit to provide a well-controlled power-up
characteristic that is independent of the PSE behavior.
This ensures a PD using the LTC4269-2 interoperability
with any PSE.
POE UNDERVOLTAGE LOCKOUT
The IEEE 802.3af/at specification for the PD dictates a
maximum turn-on voltage of 42V and a minimum turn-off
voltage of 30V. This specification provides an adequate
voltage to begin PD operation, and to discontinue PD op-
eration when the port voltage is too low. In addition, this
specification allows PD designs to incorporate an on-off
hysteresis window to prevent start-up oscillations.
The LTC4269-2 features a PoE undervoltage lockout
(UVLO) hysteresis window (See Figure 5) that conforms
with the IEEE 802.3af/at specification and accommodates
the voltage drop in the cable and input diode bridge at the
onset of the inrush current.
Once C1 is fully charged, the LTC4269-2 turns on its inter-
nal MOSFET and passes power to the PD. The LTC4269-2
applicaTions inForMaTion
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC4269IDKD-2-TRPBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:IEEE 802.3at High Power PD and Synchronous Forward Controller with AUX Support |
| LTC4270 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:12-Port PoE/PoE+/LTPoE++ PSE Controller |
| LTC4270/ | 制造商:LINER 制造商全稱:Linear Technology 功能描述:8-Port PoE/PoE PSE Controller |
| LTC4270_12 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:12-Port PoE/PoE+/LTPoE++ PSE Controller |
| LTC4270AIUKG#PBF | 制造商:Linear Technology 功能描述:POE Controller 90W 52-Pin QFN EP 制造商:Linear Technology 功能描述:Bulk 制造商:Linear Technology 功能描述:IC POE LTPOE 12-PORT PSE 52-QFN 制造商:Linear Technology 功能描述:PSE CNTRL 12 PORT 90W 1MHZ 制造商:Linear Technology 功能描述:IC PSE CONTROLLER 3.3V QFN-52 制造商:Linear Technology 功能描述:IC, PSE CONTROLLER, 3.3V, QFN-52; Input Voltage:3.3V; Supply Current:10mA; UVLO:25V; Digital IC Case Style:QFN; No. of Pins:52; Frequency:1MHz; Operating Temperature Min:-40C; Operating Temperature Max:85C; Package / Case:52-QFN ;RoHS Compliant: Yes |
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