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參數資料
| 型號： | LTC6410IUD-6#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數： | 2/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP DIFF IF 16-QFN |
| 標準包裝： | 2,500 |
| 放大器類型： | 差分 |
| 電路數： | 1 |
| 輸出類型： | 差分 |
| 轉換速率： | 1500 V/µs |
| -3db帶寬： | 1.4GHz |
| 電壓 - 輸入偏移： | 400µV |
| 電流 - 電源： | 125mA |
| 電流 - 輸出 / 通道： | 42mA |
| 電壓 - 電源，單路/雙路(±)： | 2.8 V ~ 5.5 V，±1.4 V ~ 2.75 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-WFQFN 裸露焊盤 |
| 供應商設備封裝： | 16-QFN-EP（3x3） |
| 包裝： | 帶卷 (TR) |
LTC6410-6
10
64106fa
PIN FUNCTIONS
V– (Pins 1, 4, 9, 12, 17): Negative Power Supply (Normally
Tied to Ground). All 5 pins must be tied to the same voltage.
V– maybe tied to a voltage other than ground as long as the
voltage between V+ and V– is 2.8V to 5.5V. If the V– pins
are not tied to ground, bypass each with 680pF and 0.1μF
capacitors as close to the package as possible.
VBIAS (Pin 2): This pin sets the input and output com-
mon mode voltage by driving the +IN and –IN through a
buffer with a high output resistance of 1k. If the part is
AC-coupled at the input, the VBIAS will set the VINCM and
therefore the VOUTCM voltage. If the part is DC-coupled at
the input, VBIAS should be left oating. Internal resistors
bias VBIAS to 1.4V on a 3V supply.
V+ (Pins 3, 5, 8, 10):
Positive Power Supply. All 4 pins
must be tied to the same voltage. Split supplies are pos-
sible as long as the voltage between V+ and V– is 2.8V to
5.5V. Bypass capacitors of 680pF and 0.1μF as close to the
part as possible should be used between supplies.
+OUT, –OUT (Pins 6, 7): Outputs. These pins each have
internal series termination resistors forming a differential
output resistance.
SHDN (Pin 11): This pin is internally pulled high by a typi-
cally 30k resistor to V+. By pulling this pin low the supply
current will be reduced to typically 3mA. See DC Electrical
Characteristics table for the specic logic levels.
–TERM (Pin 13): Negative Input Termination. When tied
directly to –IN, it provides an active 50Ω differential ter-
mination when +TERM is also tied directly to +IN.
–IN (Pin 14): Negative Input. This pin is normally tied to
–TERM, the input termination pin. If AC-coupled, this pin
will self bias by VBIAS.
+IN (Pin 15): Positive Input. This pin is normally tied to
+TERM, the input termination pin. If AC-coupled, this pin
will self bias by VBIAS.
+TERM (Pin 16): Positive Input Termination. When tied
directly to +IN, it provides an active 50Ω differential ter-
mination when –TERM is also tied directly to –IN.
Exposed Pad (Pin 17): V–. The Exposed Pad must be
soldered to the PCB metal.
BLOCK DIAGRAM
64106 BD
–IN
+IN
1k
6.4k
V+
V–
VBIAS
REXT
(OPT)
REXT
(OPT)
CEXT
(OPT)
CEXT
(OPT)
RO
11Ω
RO
11Ω
–OUT
+OUT
5.7k
RT
110Ω
RT
110Ω
+
–
+
–
+TERM
–IN
+IN
0.1μF
–TERM
+1
AV = 2.7V/V
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